If packet is splited outside of mpp and video_sequence_start_code is not
guaranteed, there will not be valid NALS. Thus segment fault will
happen.
Change-Id: Idb5e51772384c6663260d382b94845a8e1ac7c35
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
Modification Point:
1. Use enc configure object macro.
2. Use kmpp_obj_update to sync user cfg setup.
3. Distinguish between user mode and kernel mode for enc obj.
4. EncImpl only check codec related SET_CFG result.
5. Refactor SET_CFG flow.
6. Adapter jpeg q_mode feature.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Signed-off-by: xiaoxu.chen <xiaoxu.chen@rock-chips.com>
Change-Id: I2856acdf863189fdaa29121ad8bc007fe90b5ab5
1. Add rps_update_flag to indicate whether to update rps.
2. Fix global cfg data len for vdpu384a.
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I1c664c99f34f6dea940368496175273042b48b18
Platform: all
Spec: h264e
The hw_length is in bytes, but bit_real is in bits.
Change-Id: I53428c6347c3f33ad63d2f6dd78daa72b910055f
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
Platform: General
Spec: h264
Error case:
Forced fast play mode does not take effect.
Reported-by: redmine #567023
Change-Id: Ia167a9c59feb0d3b276588bcade691518984fca9
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
Platform: vepu_580/540/510
Spec: h265e
In tsvc mode, top p-frames not used as reference frames.
Change-Id: I0b285e5ed753e73321fd728389195f0e5b118874
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
Sync with kmpp-develop commit:
feat[kmpp]: Use enc cfg obj
Add MppEncCfgImpl to compatible with MppEncCfgSet and kmpp_obj path.
Signed-off-by: xiaoxu.chen <xiaoxu.chen@rock-chips.com>
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: Id4e262d1053c03cd93d620828405f060f0f8517c
min_bg_fqp: min frame qp for background region
max_bg_fqp: max frame qp for background region
min_fg_fqp: min frame qp for foreground region
max_fg_fqp: max frame qp for foreground region
Change-Id: Idc10767d545dd83e4157f839a621e4801c98201e
Signed-off-by: timkingh.huang <timkingh.huang@rock-chips.com>
Because the loop uses repeated i, the parsing obu units
falling into an infinite loop.
Change-Id: Idc972cc05bb6c1bee94ad0e4c3d46c07da88a73d
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Support user setting for vui_parameters_present_flag.
1. Default vui enable flag is true if not setting.
2. Call mpp_enc_cfg_set_s32(cfg, "h264:vui_en", vui_en) or
mpp_enc_cfg_set_s32(cfg, "h265:vui_en", vui_en) to
enable or disable the vui enable flag.
Platform: all
Spec: all
Reported-by: #556121 at redmine
Change-Id: Ie4a23c2879c3209377a5800d8e63c4081c34e0f7
Signed-off-by: wyc <yichen.wang@rock-chips.com>
Platform: RV1126B
Spec: h265
Error case:
The H.265 slice header syntax lacks adaptation for the case where ChromaArrayType=0.
Reported-by: redmine #559194
Source: y400-ok.265
NOTE: The decoders before RV1126B do not support YUV400.
Change-Id: I5362bc7f3894f1ec3938708563d81bf867815d9a
Signed-off-by: xiaoxu.chen <xiaoxu.chen@rock-chips.com>
1. GDR stream started with Non-IDR frame is supported and no need to
disable error.
2. Intra refreshed frames will be mark as discard if started with
Non-IDR frame.
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
Change-Id: Ide470d377f13e0512ceda4eb7219650aeffb0148
1. Refactor caller parameter on pool functions.
2. Add name on pool init.
3. Add exit leak pool print.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I39a8a966db895340a9e01ddff3a7894f1ca4b825
1. Change mpp_dec_cfg entry_table define
2. Use new update function to update MppDecCfgSet
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: Ibaf98d69664c107f79ea51e6cd83419dc1bf450a
Platform: General
Spec: vp8/vp9/mpeg2
Error case:
Stride information persists incorrectly across
resolution changes, leading to errors.
Solution:
When the stride is not set externally, it needs to
be set to 0 to avoid the stride not being updated
in time when the resolution of the same source
changes. For example, the source:
VP9_crowd_run_2048X1088_60fps_bd8_frm_resize_l41.webm
contains two resolutions: 2048x1088 and 1365x725
Source:
VP9_crowd_run_2048X1088_60fps_bd8_frm_resize_l41.webm
Reported-by: redmine #552464
Change-Id: I0e8f7c77736dbba31ccd98e559e3d7eeac240d97
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
Platform: General
Spec: vp8/vp9/mpeg2
Error case:
Ver_stride is set externally, causing sys_cfg
to use the external ver_stride directly
Solution:
If it is not necessary, do not set ver/hor_stride
externally. To minimize the impact, currently only
modify the specs that encounters problems
Source:
vp9 3840x2026 in rk3576
vp8 1920x1080 in rk3588
m2v 1920x1080 in rk3588
Reported-by: redmine #550255
Change-Id: Ie1e73e17fa2db1740d36821a5bb26fb1487e81cb
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
Platform: Chips designed before RK3576
Spec: avs2
Error case:
For RK3588 FBC, vertical pixels equals to height of image aligned with
CTU size and then plus 16.
Issue reported at redmine #550260, caused by this commit:
adf21e18ba
"Align to CTU64 to avoid info change"
Change-Id: I52ab1ff4437431666b1e6fc1e458b6981f53c821
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
Platform: All
Spec: h265
Error case:
nalu payloads with byte sequence 00 00 00 xx data used to be incorrectly detected as start code.
Solution:
Modify the start code detection logic by replacing
condition src[i+2] < 2 with src[i+2] == 1
Reported by: redmine #545594
Source: kiloview-p3.hevc
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: I7e544e127f324df42418765adc5a7a51e082736e
Platform: General
Spec: avs2
Error case:
In AVS2, CTU supports both 64 and 32 alignment. The
sys_cfg defaults to 64 alignment. However, if the
parsed CTU size is 32, it may cause additional info
changes.
This is because, initially, when calculating the
stride, there is no external stride configuration,
so it defaults to 64 alignment. After parsing the
video sequence, the stride is configured, and
calculations should then follow the configured
stride.
Solution:
During the parsing process, the stride is not set
and is entirely calculated by sys_cfg.
Reported-by: Liming Xu <rimon.xu@rock-chips.com>
Source: test_avs2_160x90.av1
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
Change-Id: I0fed8b86391a03651f22ef859ec2ff1c02647b12
