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fix[avs2d]: fix vertical stride config

Browse source 
Platform: Chips designed before RK3576
Spec: avs2

Error case:
For RK3588 FBC, vertical pixels equals to height of image aligned with
CTU size and then plus 16.

Issue reported at redmine #550260, caused by this commit:
adf21e18ba
"Align to CTU64 to avoid info change"

Change-Id: I52ab1ff4437431666b1e6fc1e458b6981f53c821
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
This commit is contained in:
Johnson Ding 2025-05-09 15:24:56 +08:00
parent be7f3bb870
commit aef67cc0ce
1 changed files with 7 additions and 2 deletions
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9
mpp/codec/dec/avs2/avs2d_dpb.c
View file

@ -507,8 +507,13 @@ static Avs2dFrame_t *dpb_alloc_frame(Avs2dCtx_t *p_dec, HalDecTask *task)
fbc_hdr_stride = MPP_ALIGN(vsh->horizontal_size, 256) | 256;
mpp_frame_set_fbc_hdr_stride(mframe, fbc_hdr_stride);
// fbc output frame update
mpp_frame_set_offset_y(mframe, 8);
if (mpp_get_soc_type() < ROCKCHIP_SOC_RK3576) {
RK_U32 ctu_size = 1 << (p_dec->vsh.lcu_size);
// fbc output frame update
mpp_frame_set_offset_y(mframe, 8);
mpp_frame_set_ver_stride(mframe, MPP_ALIGN(vsh->vertical_size, ctu_size) + 16);
}
} else if (MPP_FRAME_FMT_IS_TILE(p_dec->init.cfg->base.out_fmt))
mpp_frame_set_fmt(mframe, mpp_frame_get_fmt(mframe) | (p_dec->init.cfg->base.out_fmt & (MPP_FRAME_TILE_FLAG)));