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feat[smart_v3]: Add new frame qp interface

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min_bg_fqp: min frame qp for background region
max_bg_fqp: max frame qp for background region
min_fg_fqp: min frame qp for foreground region
max_fg_fqp: max frame qp for foreground region

Change-Id: Idc10767d545dd83e4157f839a621e4801c98201e
Signed-off-by: timkingh.huang <timkingh.huang@rock-chips.com>
This commit is contained in:
timkingh.huang 2025-07-09 16:09:50 +08:00
parent db6deeef62
commit 72492494ee
8 changed files with 26 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

6
inc/rk_venc_cmd.h
View file

@ -1590,8 +1590,10 @@ typedef struct MppEncFineTuneCfg_t {
RK_S32 bmap_qpmin_p; /* min qp for p frame in bmap */
RK_S32 bmap_qpmax_i; /* max qp for i frame in bmap */
RK_S32 bmap_qpmax_p; /* max qp for p frame in bmap */
RK_S32 reserved[4];
RK_S32 min_bg_fqp; /* min frame qp for background region */
RK_S32 max_bg_fqp; /* max frame qp for background region */
RK_S32 min_fg_fqp; /* min frame qp for foreground region */
RK_S32 max_fg_fqp; /* max frame qp for foreground region */
} MppEncFineTuneCfg;
#endif /*__RK_VENC_CMD_H__*/

2
inc/rk_venc_rc.h
View file

@ -34,7 +34,7 @@ typedef enum MppEncRcMode_e {
} MppEncRcMode;
typedef enum MppEncSeMode_e {
MPP_ENC_SE_DIABLE = 0, // disable super encoder
MPP_ENC_SE_DISABLE = 0, // disable super encoder
MPP_ENC_SE_MODE_BAL, // balance mode
MPP_ENC_SE_MODE_QF, // quality first mode
MPP_ENC_SE_MODE_BF, // bitrate first mode

6
mpp/base/mpp_enc_cfg.c
View file

@ -272,7 +272,11 @@ static RK_U32 mpp_enc_cfg_debug = 0;
ENTRY(tune, bmap_qpmin_i, S32, MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG, tune, bmap_qpmin_i) \
ENTRY(tune, bmap_qpmin_p, S32, MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG, tune, bmap_qpmin_p) \
ENTRY(tune, bmap_qpmax_i, S32, MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG, tune, bmap_qpmax_i) \
ENTRY(tune, bmap_qpmax_p, S32, MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG, tune, bmap_qpmax_p)
ENTRY(tune, bmap_qpmax_p, S32, MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG, tune, bmap_qpmax_p) \
ENTRY(tune, min_bg_fqp, S32, MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG, tune, min_bg_fqp) \
ENTRY(tune, max_bg_fqp, S32, MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG, tune, max_bg_fqp) \
ENTRY(tune, min_fg_fqp, S32, MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG, tune, min_fg_fqp) \
ENTRY(tune, max_fg_fqp, S32, MPP_ENC_TUNE_CFG_CHANGE_SMART_V3_CFG, tune, max_fg_fqp)
static void mpp_enc_cfg_srv_init()
{

4
mpp/codec/enc/h264/h264e_api_v2.c
View file

@ -211,6 +211,10 @@ static void init_h264e_cfg_set(MppEncCfgSet *cfg, MppClientType type)
cfg->tune.bmap_qpmin_p = 30;
cfg->tune.bmap_qpmax_i = 45;
cfg->tune.bmap_qpmax_p = 47;
cfg->tune.min_bg_fqp = 30;
cfg->tune.max_bg_fqp = 45;
cfg->tune.min_fg_fqp = 25;
cfg->tune.max_fg_fqp = 35;
}
static void h264e_add_syntax(H264eCtx *ctx, H264eSyntaxType type, void *p)

4
mpp/codec/enc/h265/h265e_api.c
View file

@ -136,6 +136,10 @@ static MPP_RET h265e_init(void *ctx, EncImplCfg *ctrlCfg)
p->cfg->tune.bmap_qpmin_p = 30;
p->cfg->tune.bmap_qpmax_i = 45;
p->cfg->tune.bmap_qpmax_p = 47;
p->cfg->tune.min_bg_fqp = 30;
p->cfg->tune.max_bg_fqp = 45;
p->cfg->tune.min_fg_fqp = 25;
p->cfg->tune.max_fg_fqp = 35;
/*
* default prep:

4
mpp/codec/mpp_enc_impl.cpp
View file

@ -982,6 +982,10 @@ MPP_RET mpp_enc_proc_tune_cfg(MppEncFineTuneCfg *dst, MppEncFineTuneCfg *src)
dst->bmap_qpmin_p = src->bmap_qpmin_p;
dst->bmap_qpmax_i = src->bmap_qpmax_i;
dst->bmap_qpmax_p = src->bmap_qpmax_p;
dst->min_bg_fqp = src->min_bg_fqp;
dst->max_bg_fqp = src->max_bg_fqp;
dst->min_fg_fqp = src->min_fg_fqp;
dst->max_fg_fqp = src->max_fg_fqp;
}
dst->change |= change;

2
mpp/hal/common/h264/hal_h264e_debug.h
View file

@ -29,6 +29,7 @@
#define HAL_H264E_DBG_AMEND (0x00000040)
#define HAL_H264E_DBG_RC (0x00000100)
#define HAL_H264E_DBG_SMART_V3 (0x00000200)
#define hal_h264e_dbg(flag, fmt, ...) _mpp_dbg(hal_h264e_debug, flag, fmt, ## __VA_ARGS__)
#define hal_h264e_dbg_f(flag, fmt, ...) _mpp_dbg_f(hal_h264e_debug, flag, fmt, ## __VA_ARGS__)
@ -42,6 +43,7 @@
#define hal_h264e_dbg_amend(fmt, ...) hal_h264e_dbg_f(HAL_H264E_DBG_AMEND, fmt, ## __VA_ARGS__)
#define hal_h264e_dbg_rc(fmt, ...) hal_h264e_dbg_f(HAL_H264E_DBG_RC, fmt, ## __VA_ARGS__)
#define hal_h264e_dbg_smartv3(fmt, ...) hal_h264e_dbg_f(HAL_H264E_DBG_SMART_V3, fmt, ## __VA_ARGS__)
#define hal_h264e_enter() hal_h264e_dbg_func("enter\n");
#define hal_h264e_leave() hal_h264e_dbg_func("leave\n");

2
mpp/hal/common/h265/hal_h265e_debug.h
View file

@ -30,6 +30,7 @@
#define HAL_H265E_DBG_WGT_REGS (0x00000080)
#define HAL_H265E_DBG_RDO_REGS (0x000000C0)
#define HAL_H265E_DBG_ST_REGS (0x00000100) /* status registers */
#define HAL_H265E_DBG_SMART_V3 (0x00000200)
#define HAL_H265E_DBG_INPUT (0x00020000)
#define HAL_H265E_DBG_OUTPUT (0x00040000)
@ -50,6 +51,7 @@
#define hal_h265e_dbg_wgt(fmt, ...) hal_h265e_dbg(HAL_H265E_DBG_WGT_REGS, fmt, ## __VA_ARGS__)
#define hal_h265e_dbg_rdo(fmt, ...) hal_h265e_dbg(HAL_H265E_DBG_RDO_REGS, fmt, ## __VA_ARGS__)
#define hal_h265e_dbg_st(fmt, ...) hal_h265e_dbg(HAL_H265E_DBG_ST_REGS, fmt, ## __VA_ARGS__)
#define hal_h265e_dbg_smartv3(fmt, ...) hal_h265e_dbg(HAL_H265E_DBG_SMART_V3, fmt, ## __VA_ARGS__)
#define hal_h265e_dbg_input(fmt, ...) hal_h265e_dbg(HAL_H265E_DBG_INPUT, fmt, ## __VA_ARGS__)
#define hal_h265e_dbg_output(fmt, ...) hal_h265e_dbg(HAL_H265E_DBG_OUTPUT, fmt, ## __VA_ARGS__)