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464 commits

Author SHA1 Message Date
Herman Chen
067de5647a feat[mpp_enc_cfg]: Change to object implement 
Modification Point:
1. Use enc configure object macro.
2. Use kmpp_obj_update to sync user cfg setup.
3. Distinguish between user mode and kernel mode for enc obj.
4. EncImpl only check codec related SET_CFG result.
5. Refactor SET_CFG flow.
6. Adapter jpeg q_mode feature.

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Signed-off-by: xiaoxu.chen <xiaoxu.chen@rock-chips.com>
Change-Id: I2856acdf863189fdaa29121ad8bc007fe90b5ab5
 2025-10-24 11:18:37 +08:00
Herman Chen
f507421f8b chore[mpp_enc_cfg]: Remove MppEncCodecCfg 
1. Revert codec cfg to separate h264/h265/jpeg/vp8 cfg.
2. Update enc/dec/sys cfg_test print.

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: Ida5da8a6b738fbf710e1ab590bc6b6f3438319c4
 2025-09-10 17:39:55 +08:00
xiaoxu.chen
54bdc5ddbc refactor[enc]: Use KmppShmPtr to represent osd buffer 
Change-Id: I2211b806d4b4a065faf1f0fa5a240e104bbb30ab
Signed-off-by: xiaoxu.chen <xiaoxu.chen@rock-chips.com>
 2025-08-13 14:55:14 +08:00
xiaoxu.chen
317fce0bee chore[hal]: Organize the relevant processes for vepu fmt 
1. Move Vepu fmt from vepu541_common to vepu5xx_common
2. Create vepu580_common
3. Add vepu ARGB4444, ARGB1555, AYUV1BPP, AYUV2BPP

Change-Id: I372e35d9ccf93ecf082d4a279c03841bef3bc581
Signed-off-by: xiaoxu.chen <xiaoxu.chen@rock-chips.com>
 2025-08-12 03:40:29 +00:00
xiaoxu.chen
8808b16d7a feat[mpp]: Add jpeg roi function for RV1126B 
Change-Id: I41bb66fbe1abf4adfa32162630e00d4050adb516
Signed-off-by: xiaoxu.chen <xiaoxu.chen@rock-chips.com>
 2025-08-06 14:39:34 +08:00
Yanjun Liao
05f59be432 fix[hal_h265e]: Fix nal type in tsvc mode 
Platform: vepu_580/540/510
Spec: h265e

In tsvc mode, top p-frames not used as reference frames.

Change-Id: I0b285e5ed753e73321fd728389195f0e5b118874
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
 2025-07-25 11:02:42 +08:00
xiaoxu.chen
be7fc93fc2 fix[vepu511]: Add tune stat update 
Change-Id: I813fbf37735673660bde2266a25939690d15e98d
Signed-off-by: xiaoxu.chen <xiaoxu.chen@rock-chips.com>
 2025-07-14 17:51:16 +08:00
timkingh.huang
07580ac761 fix[hal_h265e]: Fix crash on zero gop 
Change-Id: I733c8ab6d313b525a6d84f6f1b24c96c78abf7b5
Signed-off-by: timkingh.huang <timkingh.huang@rock-chips.com>
 2025-06-25 07:00:37 +00:00
timkingh.huang
560ac10baf feat[vepu510]: Add smart v3 interface 
Change-Id: Ib2dea60f794f1ef404cf91b75053d8cf2639fd6b
Signed-off-by: timkingh.huang <timkingh.huang@rock-chips.com>
 2025-06-24 16:22:18 +08:00
xiaoxu.chen
2506f5df61 fix[hal_h264e]: Fix h264 poc_type reg configure 
Change-Id: Ife9fd9bc96037406cfbea16c3c4fef45d4a5a3dd
Signed-off-by: xiaoxu.chen <xiaoxu.chen@rock-chips.com>
 2025-06-23 10:01:34 +00:00
Yanjun Liao
6fc495af49 fix[vepu_540c]: Reduce print hw_status when irq ret 
Change-Id: I2a0f48bb21fd31513e7e9a1f390dde1d0ec5f720
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
 2025-05-16 17:34:23 +08:00
Yanjun Liao
6d3cc5ea5d fix[vepu541]: Add warning for unsupport nv21/nv42 
VEPU_541 unsupport uv_swap in nv12/nv24.

Change-Id: I768b9a5fc5657a8d8eb58feeb0f09756a6197c3e
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
 2025-05-13 10:03:45 +08:00
Yandong Lin
ea8b5af151 fix[mpp]: Fix compile warning with ipc sdk toolchain 
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I206b473b904e69d10644897e47ba1933ada8204d
 2025-04-03 14:43:14 +08:00
Yanjun Liao
ae4d4378e8 fix[vepu_511]: Speed grade configuration of 0.67 
Modified default speed preset configuration to 0.67 PPC,
delivering ~40 FPS for 4K resolution at 500MHz

Change-Id: If4b11f1d45871a377403afb8dd98f727124ce499
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
 2025-03-28 14:05:56 +08:00
Yanjun Liao
43a191ede7 feat[vepu_511]: Add rv1126b 265e/264e/jpge support 
Change-Id: Ie6baf5a0820ecfe9adbb49dd4d267fc2c51d5c2a
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
 2025-03-26 03:52:57 +00:00
Yanjun Liao
1b0aef1de8 fix[hal_h265e_vepu580]: Fix overflow status check 
Encoder should continue when indicates stream overflow hw_status.

Change-Id: I5a04ca6016bb0c0050ae291832b467e3b7e53cc5
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
 2025-03-11 18:10:06 +08:00
Rimon Xu
beb2bd2793 fix[vepu510]: Mark frame first part when split slice out 
Signed-off-by: Rimon Xu <rimon.xu@rock-chips.com>
Change-Id: I5c481ca5738e1ad1ae466e8e91749f4bf1c8a209
 2025-02-18 17:29:36 +08:00
Johnson Ding
75e9008ea9 fix[jpege_vpu720]: Correct encoded size config 
Encoded width and height should align with MCU size.

Change-Id: If62629f9ca7275bafaa156b55af001b10b0e836b
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
 2025-02-11 08:14:10 +00:00
Hongjin Li
8763144523 refactor[hal]: Update the reg offset setting method. 
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
Change-Id: If63cbfdae4150280b4d24698543990a454ed5f6f
 2024-12-27 11:54:55 +08:00
nyanmisaka
f929cdeb63 fix[vepu580]: fix is_yuv/is_fbc typo 
MPP_FRAME_FMT_IS_YUV() should be used.

fixes 5f522dc

Signed-off-by: nyanmisaka <nst799610810@gmail.com>
Change-Id: If279598df7c078aa69f6eb8d71ecc59d6af960c8
 2024-12-09 09:22:59 +08:00
Johnson Ding
5f522dcaf0 fix[vepu580]: fix incorrect color range problem 
For H.264 and H.265 encoder on RK3588, when input source is YUV, keep
input source. For RGB, transalting according range setting from API.

Change-Id: Icf0ffdb80d7fcc4027b8bd7b9b7fd673fc6e3b0b
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
 2024-11-25 09:58:31 +08:00
Yandong Lin
4a2bd2aea6 fix[hal_vepu580]: re-get roi buf when resolution switch 
Change-Id: Iba09d1daffaed9391b93c124d203487a396ffb6a
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
 2024-10-29 09:59:55 +08:00
Yandong Lin
a0fbdd3c21 fix[hal_vepu541]: re-get roi buf when resolution switch 
Change-Id: I2ebc2c731abb8cd45d1d9df98f3eb420a7091de1
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
 2024-10-29 09:59:55 +08:00
Tingjin Huang
eff1e2ede3 fix[vepu580]: Add md info internal buffer 
If md info buffer is NULL, prepare md info internal buffer
when deblur is enabled

Change-Id: I7bd4e731ffbe6164ac4e02d0d901464dcc57f9c1
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
 2024-09-29 14:50:01 +08:00
Tingjin Huang
555485b87c fix[vepu580]: Add ATF weight adjust switch for H.265 
Do not adjust the ATF weight when skip bias is enabled.

Change-Id: I2a66aef51336d79df12e7366f12163ebd0e8a5bf
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
 2024-09-29 09:46:53 +08:00
Tingjin Huang
179122cc99 fix[tune]: Replace qpmap_en with deblur_en 
Deblur_en is more generic for upper application.

Change-Id: Ibe4e0f81851fdbbe8fb8b7d840a4a9380e0403b1
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
 2024-09-29 09:46:19 +08:00
xiaoxu.chen
a4bd0d2a69 refactor[h265]: unify calculation tile width 
Change-Id: Ib5200e332cc5be47f79561570c0342e7690e4587
Signed-off-by: xiaoxu.chen <xiaoxu.chen@rock-chips.com>
 2024-09-25 14:14:03 +08:00
timkingh.huang
61d34ba1d1 fix[vepu580]: Fix motion level assignment error 
Change-Id: I3de290596126c26ac3711c4b6d83c83f01a717f0
Signed-off-by: timkingh.huang <timkingh.huang@rock-chips.com>
 2024-09-24 14:33:12 +08:00
Tingjin Huang
c48a88c2fa feat[vepu510]: Add scaling list regs setup 
H.264: intra8x8 and inter8x8 for luma only
H.265: intra/inter 8x8/16x16 for luma and chroma,
       intra/inter 32x32 for luma

Change-Id: I6ca3d5985af7d3d7e7c1bc99db820cd166be0624
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
 2024-09-13 14:51:44 +08:00
Tingjin Huang
ba450dd834 fix[vepu510]: Sync code from enc_tune branch 
1. Fix AQ setup error for smart H.264
2. Fix initial value error of qp_min
3. Adjust H.264 regs setup for CVR scene

Change-Id: I38b09edb95532a3c1e9a544584c6d258f05fc43b
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
 2024-09-10 17:42:41 +08:00
Tingjin Huang
01dee1b7d4 feat[vepu580]: Optimization to improve VMAF 
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
Change-Id: Idaecf9a402aa9b87802d76911abb816e0dc557ec
 2024-08-29 10:04:03 +08:00
Tingjin Huang
df0b9e3a0d feat[vepu580]: Optimize hal processing for smart encoding 
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
Change-Id: I27ec19fcfa6c71bb1d084fea7d40853fed3e4603
 2024-08-29 10:04:03 +08:00
Tingjin Huang
e0e70e96d2 feat[vepu510]: Add anti-smear regs setup for H.264 
Change-Id: I46ce011c215a632c871ea8816563a2eb598146e0
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
 2024-08-27 10:24:49 +08:00
Tingjin Huang
16e700e41e feat[vepu510]: Add H.264 tuning setup 
1. Add AQ regs setup. There is no aq clip operation which is
different from vepu500.
2. Update anti-stripe regs setup. Option "-atl 1/0" to enable/disable.
3. Add anti-ringing regs setup
4. Add anti-flicker regs setup

Change-Id: Ia36073d26ab5587f3478f7f8b4cdfe8a1ffed8f4
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
 2024-08-27 10:24:39 +08:00
liming.lou
1bb6ff8993 feat[vepu510]: Sync code from enc_tune branch 
1. Design 8 mode for smear
2. Adjust atf_e and atr_e switch
3. Adjust aq thd and aq qp delta
4. Modify appropriate parameters for smear
5. Add sao atr atl configure interface

Change-Id: I0afb7e3d920dddfd33ea8d81fcbda5dd0d6801d3
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
 2024-08-27 10:23:33 +08:00
toby.zhang
03696728e1 feat[vepu510]: Sync code from enc_tune branch 
1. Add anti-line tuning
2. Adjust AQ assignment
3. Add smart encoding
4. Add deblur/qpmap routine
5. Add atf & four level intensity control atf
6. Add atr anti_blur function
7. Add real time bitrate output
8. Add smear buffer for vepu510

Change-Id: Iae661686f6adacd0b5ec57c102c184e2537dfc7d
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
 2024-08-27 10:23:23 +08:00
toby.zhang
02095f66d3 feat[vepu510]: Sync code from enc_tune branch 
1. Add cu_qp_delta_depth cfg
2. Configure AQ regs for H.265
3. Configure regs according to scene mode
4. Support fixed frame level QP
5. Add RDO lambda table index
6. Update stat info for HEVC
7. Add tuning code for H.264 encoder

Change-Id: Id7dae4ed55e1b94622aee72cfce8f24c833d00e1
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
 2024-08-27 10:08:49 +08:00
Yandong Lin
a412466af8 fix[hal_vepu]: fix split regs assignment 
Change-Id: Idba725a871dbac7ce070e0bb66701f1584e06bb4
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
 2024-08-03 11:05:44 +08:00
Yandong Lin
b71f7be716 fix[vepu580]: poll max set to 1 on split out lowdelay mode 
Change-Id: I76e80cda83db4cc63998906d62f98181e282a91e
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
 2024-08-02 17:22:47 +08:00
Yanjun Liao
6766b43a6b fix[h265e_vepu510]: Fix a memory leak 
Change-Id: Ib5eb57ec755f732912bc0564e85fad4eb7cd1226
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
 2024-07-16 11:21:26 +08:00
Yandong Lin
6ba70a2e8d fix[hal_h265e_vepu510]: disable dvbm_err_en 
Prevent trigger dvbm err interrupt falsely.

Change-Id: I16f3caf6aea20f3bcef8b5bb1ebafd2073293aee
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
 2024-06-17 15:37:11 +08:00
xiaoxu.chen
4c92df3f7c fix[hal_vepu580]: fix debreath enable problem 
1. fix h264 width align
2. fix h265 rotation problem

Change-Id: I9f7398968d9a70f5e2acc4cb2c30250f4617042d
Signed-off-by: xiaoxu.chen <xiaoxu.chen@rock-chips.com>
 2024-06-14 14:30:43 +08:00
xueman.ruan
36e263402a fix[hal_h264e]: fix segment err when encode tsvc 
update segment info after amend stream

Change-Id: I6dc1ace0bcd58746f3fd0755c980e22482219f3d
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
 2024-06-13 09:17:12 +08:00
Yanjun Liao
50f108baf2 fix[hal_h265e]: Amend 510 tid and sync cache 
Change-Id: I93f96a7da6d3caa183f4991a3a6901a6dc697b44
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
 2024-06-07 11:54:01 +08:00
Yanjun Liao
ae4baaf917 fix[hal_h265e]: Fix nalu type avoid stream warning 
Change-Id: Ic59c77a7276a4ca2ad1cb391c5da2316903a824c
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
 2024-06-07 10:02:07 +08:00
Yandong Lin
c6a6cdfa2c fix[hal_h265e]: fix sse_sum get err 
Change-Id: I194c6d1b2fe6b1de52a1ce9f5c2cf56046352df9
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
 2024-05-22 21:42:11 +08:00
Yanjun Liao
0e12c5da26 fix[enc_roi]: Support ROI cfg under CQP mode 
Change-Id: I9049bd13dfadee20f3149e511f7e6393f1810126
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
 2024-05-17 09:42:25 +08:00
Hongjin Li
9b1f18daf0 fix[hal]: Fix the lib interdependence issue 
Adjust the hal layer compilation structure
and fix the lib interdependence issue.

Change-Id: I7b400b679c8592b12fae865ff0638f177bbf0d60
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
 2024-05-16 10:18:48 +08:00
Yanjun Liao
584d986e1f fix[vepu_510]: fix same log type when enc feedback 
feedback ONE_SLICE_FINISH irq is not a err.

Change-Id: I350252b78750672dc3123e0983b1edf7d870c26e
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
 2024-05-15 18:15:00 +08:00
Yandong Lin
1d1b8139db fix[hal_vepu580/510]: fix split out err when pass1 frame 
pass1 frame will disable split mode, so split out need to be disable.

Change-Id: Id1d504f954848c6b4b270788ecf077897238f82f
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
 2024-05-10 15:57:47 +08:00