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linux-rockchip/drivers/usb
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Stephen Chen 0e40ee39c5 Revert "usb: dwc3: core: Do not perform GCTL_CORE_SOFTRESET during bootup" 
This reverts commit d376ca6716.

It's reported that when using Radxa CM5 with RPI CM4 IO board,
USB2.0 host ports don't work.

By default RK3588 USB DRD DWC3_0 (usb@fc000000) is set in otg mode.
In hardware, RK3588 TYPEC0_USB20_OTG_ID is pulled down to groud
by a 2.2k resistor.

It is needed to perform GCTL_CORE_SOFTRESET during bootup.

Signed-off-by: Stephen Chen <stephen@radxa.com>
(cherry picked from commit ec8a9ad8bf5ddbe8ad7cba3d0deafbcba204092a)
Signed-off-by: Joshua Riek <jjriek@verizon.net>
2025-04-15 20:18:21 +02:00
..
atm
c67x00
cdns3 usb: xhci: fix loss of data on Cadence xHC 2024-10-17 15:21:25 +02:00
chipidea usb: chipidea: udc: enable suspend interrupt after usb reset 2024-10-17 15:22:16 +02:00
class USB: class: CDC-ACM: fix race between get_serial and set_serial 2024-10-17 15:21:19 +02:00
common
core khadas: drivers/usb/core 2025-04-15 20:16:40 +02:00
dwc2 This is the 6.1.115 stable release 2025-01-10 17:48:57 +08:00
dwc3 Revert "usb: dwc3: core: Do not perform GCTL_CORE_SOFTRESET during bootup" 2025-04-15 20:18:21 +02:00
early
gadget This is the 6.1.115 stable release 2025-01-10 17:48:57 +08:00
host This is the 6.1.115 stable release 2025-01-10 17:48:57 +08:00
image
isp1760
misc Revert "usb: yurex: Replace snprintf() with the safer scnprintf() variant" 2024-10-17 15:22:25 +02:00
mon
mtu3
musb
phy
renesas_usbhs
roles
serial USB: serial: option: add Telit FN920C04 MBIM compositions 2024-10-22 15:56:49 +02:00
storage This is the 6.1.115 stable release 2025-01-10 17:48:57 +08:00
typec usb: typec: tcpm: add devicetree property faster-pd-negotiation to make pd negotiation faster 2025-04-15 20:16:56 +02:00
usbip usbip: Don't submit special requests twice 2024-09-08 07:53:10 +02:00
Kconfig
Makefile
usb-skeleton.c