dts: fxblox remove sd pwr gpio and correct bt wake gpio

This commit is contained in:
mahdichi 2024-11-11 20:26:54 +03:30 committed by Mecid Urganci
parent d25742c780
commit 551c31c821

View file

@ -498,7 +498,7 @@
};
&sdmmc {
max-frequency = <150000000>;
max-frequency = <200000000>;
no-sdio;
no-mmc;
bus-width = <4>;
@ -506,8 +506,10 @@
cap-sd-highspeed;
disable-wp;
sd-uhs-sdr104;
//vmmc-supply = <&vcc_3v3_sd_s3>;
vmmc-supply = <&vcc_3v3_s3>;
vqmmc-supply = <&vccio_sd_s0>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>;
status = "okay";
};
@ -1129,7 +1131,7 @@
// pcie3x4
&pcie3x4 {
reset-gpios = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>;
//vpcie3v3-supply = <&vcc3v3_pcie30>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};
@ -1292,7 +1294,7 @@
};
bt_host_wake_l: bt-host-wake-l {
rockchip,pins = <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
bt_wake_l: bt-wake-l {
@ -1300,11 +1302,6 @@
};
};
sdmmc {
sd_s0_pwr: sd-s0-pwr {
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
&edp0 {