Add Blueberry R58 HD3 device trees

This commit is contained in:
Jianfeng Liu 2025-09-25 18:05:05 +08:00 committed by Igor
parent 155d924426
commit 53aa6209c6
4 changed files with 1497 additions and 0 deletions

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@ -245,6 +245,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-edge-v12-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-edge-v12-maizhuo-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-edge-v14-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-minipc-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-r58-hd3-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-minipc-mizhuo-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568m-serdes-evb-camera-csi-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568m-serdes-evb-camera-dvp-v10.dtb
@ -449,3 +450,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-tablet-v11.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-luckfox-core3566.dtb
subdir-y := $(dts-dirs) overlay
# Armbian: Incremental: assuming overlay targets are already in the Makefile

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@ -0,0 +1,344 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
#include "rk3588-blueberry-r58-hd3.dtsi"
#include "rk3588-linux.dtsi"
#include "rk3588-blueberry-r58-hd3-rk628-hdmi2csi.dtsi"
/ {
model = "RK3588 R58-HD Board";
compatible = "rockchip,rk3588-R58-HD-v10-linux", "rockchip,rk3588";
/delete-node/ chosen;
fan{
compatible = "pwm-fan";
#cooling-cells = <2>;
pwms = <&pwm5 0 50000 0>;
cooling-levels = <0 50 100 150 200 255>;
rockchip,temp-trips = <
60000 1
65000 2
70000 3
75000 4
80000 5
>;
enable-gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&fan_enable_gpio>;
};
//软件保留
backlight_mipi0: backlight_mipi0 {
compatible = "pwm-backlight";
pwms = <&pwm9 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
>;
default-brightness-level = <2>;
};
//软件保留
backlight_mipi1: backlight_mipi1 {
compatible = "pwm-backlight";
pwms = <&pwm15 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
>;
default-brightness-level = <2>;
};
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
status = "okay";
};
//风扇
&pwm4 {
pinctrl-0 = <&pwm4m0_pins>;
status = "disabled";
};
&pwm5 {
pinctrl-0 = <&pwm5m1_pins>;
status = "okay";
};
//mipi0
&pwm9 {
pinctrl-0 = <&pwm9m0_pins>;
status = "okay";
};
//mipi1
&pwm15 {
pinctrl-0 = <&pwm15m2_pins>;
status = "okay";
};
#if 1
&dsi0 {
status = "okay";
//rockchip,lane-rate = <120>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
backlight = <&backlight_mipi0>;
//power-supply = <&vcc3v3_mipi_lcd_power>;
reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>;
//enable-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
reset-delay-ms = <100>;
enable-delay-ms = <10>;
init-delay-ms = <100>;
prepare-delay-ms = <100>;
unprepare-delay-ms = <10>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
05 78 01 11
05 78 01 29
];
panel-exit-sequence = [
05 00 01 28
05 00 01 10
];
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <148500000>;
hactive = <1920>;
vactive = <1080>;
hback-porch = <148>;
hfront-porch = <88>;
hsync-len = <44>;
vback-porch = <36>;
vfront-porch = <4>;
vsync-len = <5>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi0: endpoint {
remote-endpoint = <&dsi0_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi0_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi0>;
};
};
};
};
&mipi_dcphy0 {
status = "okay";
};
&dsi0_in_vp2 {
status = "okay";
};
&dsi0_in_vp3 {
status = "disabled";
};
&route_dsi0 {
status = "disabled";
connect = <&vp2_out_dsi0>;
};
#endif
#if 1
&dsi1 {
status = "okay";
//rockchip,lane-rate = <120>;
dsi1_panel: panel@1 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
backlight = <&backlight_mipi1>;
//power-supply = <&vcc3v3_mipi_lcd_power>;
reset-gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
//enable-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
reset-delay-ms = <100>;
enable-delay-ms = <10>;
init-delay-ms = <100>;
prepare-delay-ms = <100>;
unprepare-delay-ms = <10>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
05 78 01 11
05 78 01 29
];
panel-exit-sequence = [
05 00 01 28
05 00 01 10
];
display-timings {
native-mode = <&timing1>;
timing1: timing1 {
clock-frequency = <148500000>;
hactive = <1920>;
vactive = <1080>;
hback-porch = <148>;
hfront-porch = <88>;
hsync-len = <44>;
vback-porch = <36>;
vfront-porch = <4>;
vsync-len = <5>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi0_out_panel1>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi0_out_panel1: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
&mipi_dcphy1 {
status = "okay";
};
&dsi1_in_vp3 {
status = "okay";
};
&route_dsi1 {
status = "disabled";
connect = <&vp3_out_dsi1>;
};
#endif
&pinctrl {
lt9611 {
lt9611_reset_gpios: lt9611reset-gpios {
rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
fan_enable_gpio { //v10-1 V09 GPIO0_A0 控制风扇
fan_enable_gpio: fan_enable_gpio{
rockchip,pins =
<3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&sdmmc_pwr {
rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
&vcc_sd {
compatible = "regulator-fixed";
gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_pwr>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
regulator-name = "vcc_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <100000>;
vin-supply = <&vcc12v_dcin>;
};
&gmac0 {
snps,reset-gpio = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
};
//v10-2 V09版本 GPIO0_C5 作为4G 唤醒口
&DP0_HPDIN_gpio{
rockchip,pins =
<0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
};
&dp0 {
pinctrl-names = "default";
pinctrl-0 = <&DP0_HPDIN_gpio>;
hpd-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
split-mode;
status = "okay";
};
&lt6911_sound {
compatible;
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,lt6911";
simple-audio-card,bitclock-master ;
simple-audio-card,frame-master ;
status = "disabled";
simple-audio-card,cpu {
sound-dai ;
};
dailink1_master: simple-audio-card,codec {
sound-dai ;
};
};

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@ -0,0 +1,190 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
*
*/
/ {
rk628_dc: rk628-dc {
compatible = "rockchip,dummy-codec";
#sound-dai-cells = <0>;
};
rk628-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,rk628";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,bitclock-master = <&dailink2_master>;
simple-audio-card,frame-master = <&dailink2_master>;
status = "okay";
simple-audio-card,cpu {
sound-dai = <&i2s1_8ch>;
};
dailink2_master: simple-audio-card,codec {
sound-dai = <&rk628_dc>;
};
};
};
//rk628 sound
&i2s1_8ch {
status = "okay";
pinctrl-0 = <&i2s1m0_lrck
&i2s1m0_sclk
&i2s1m0_sdi0>;
};
&pinctrl {
hdmiin {
//mipicsi1_pwr: mipicsi1-pwr {
// rockchip,pins =
// /* 628H camera power en */
// <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
//};
rk628_hdmiin_pin: rk628-hdmiin-pin {
rockchip,pins =
<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
<4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
<1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
/* rk628 hdmi in */
&mipi2_csi2 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi2_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csidphy0_out>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi2_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi2_in0>;
};
};
};
};
&csi2_dphy0 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_in_lt6911: endpoint@1 {
reg = <1>;
remote-endpoint = <&lt6911_out>;
data-lanes = <1 2 3 4>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csidphy0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi2_csi2_input>;
};
};
};
};
&csi2_dphy0_hw {
status = "okay";
};
&csi2_dphy1_hw {
status = "okay";
};
&i2c7 {
pinctrl-names = "default";
pinctrl-0 = <&i2c7m2_xfer>;
status = "okay";
rk628_csi: rk628_csi@51 {
reg = <0x51>;
compatible = "rockchip,rk628-csi-v4l2";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&rk628_hdmiin_pin &refclk_pins>;
power-domains = <&power RK3588_PD_VI>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PD1 IRQ_TYPE_EDGE_RISING>;
//enable-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_LOW>;
plugin-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
continues-clk = <1>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "HDMI-MIPI1";
rockchip,camera-module-lens-name = "RK628-CSI";
multi-dev-info {
dev-idx-l = <2>;
dev-idx-r = <4>;
combine-idx = <2>;
pixel-offset = <0>;
dev-num = <2>;
};
port {
lt6911_out: endpoint {
remote-endpoint = <&mipi_in_lt6911>;
data-lanes = <1 2 3 4>;
};
};
};
};
&rkcif {
status = "okay";
};
&rkcif_mipi_lvds2 {
status = "okay";
port {
cif_mipi2_in0: endpoint {
remote-endpoint = <&mipi2_csi2_output>;
};
};
};
&rkcif_mmu {
status = "okay";
};
/* rk628 hdmi in end */

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@ -0,0 +1,960 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/
#include "dt-bindings/usb/pd.h"
#include "rk3588.dtsi"
#include "rk3588-blueberry.dtsi"
#include "rk3588-rk806-single.dtsi"
/ {
/* If hdmirx node is disabled, delete the reserved-memory node here. */
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* Reserve 256MB memory for hdmirx-controller@fdee0000 */
cma {
compatible = "shared-dma-pool";
reusable;
reg = <0x0 (256 * 0x100000) 0x0 (256 * 0x100000)>;
linux,cma-default;
};
};
hdmiin-sound {
compatible = "rockchip,hdmi";
rockchip,mclk-fs = <128>;
rockchip,format = "i2s";
rockchip,bitclock-master = <&hdmirx_ctrler>;
rockchip,frame-master = <&hdmirx_ctrler>;
rockchip,card-name = "rockchip,hdmirx";
rockchip,cpu = <&i2s7_8ch>;
rockchip,codec = <&hdmirx_ctrler 0>;
rockchip,jack-det;
};
es8388_sound: es8388-sound {
status = "okay";
compatible = "rockchip,multicodecs-card";
rockchip,card-name = "rockchip-es8388";
//hp-det-gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
rockchip,format = "i2s";
rockchip,mclk-fs = <256>;
rockchip,cpu = <&i2s0_8ch>;
rockchip,codec = <&es8388>;
rockchip,audio-routing =
"Headphone", "LOUT1",
"Headphone", "ROUT1",
"Speaker", "LOUT2",
"Speaker", "ROUT2",
"Headphone", "Headphone Power",
"Headphone", "Headphone Power",
"Speaker", "Speaker Power",
"Speaker", "Speaker Power",
"LINPUT1", "Main Mic",
"LINPUT2", "Main Mic",
"RINPUT1", "Headset Mic",
"RINPUT2", "Headset Mic";
pinctrl-names = "default";
//pinctrl-0 = <&hp_det>;
};
lt6911_dc: lt6911-dc {
compatible = "rockchip,dummy-codec";
#sound-dai-cells = <0>;
};
lt6911_sound:lt6911-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,lt6911";
simple-audio-card,bitclock-master = <&dailink1_master>;
simple-audio-card,frame-master = <&dailink1_master>;
status = "okay";
simple-audio-card,cpu {
sound-dai = <&i2s1_8ch>;
};
dailink1_master: simple-audio-card,codec {
sound-dai = <&lt6911_dc>;
};
};
leds: leds {
compatible = "gpio-leds";
work_led: work-led {
gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "on";
};
work_4g: work-4g {
gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
};
gpio_keys: gpio-keys {
compatible = "gpio-keys";
autorepeat;
pinctrl-names = "default";
pinctrl-0 = <&pwrbtn>;
power {
debounce-interval = <100>;
gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_LOW>;
//gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
label = "GPIO Key Power";
linux,code = <KEY_POWER>;
wakeup-source;
};
};
vk2c21_lcd {
compatible = "lcd_vk2c21";
i2c_scl = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
i2c_sda = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
status = "disabled";//"okay"; //zxLog_2022.9.20 for maozhuo time-lcd show;
};
pcie30_avdd0v75: pcie30-avdd0v75 {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd0v75";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
vin-supply = <&vdd_0v75_s0>;
};
pcie30_avdd1v8: pcie30-avdd1v8 {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd1v8";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&avcc_1v8_s0>;
};
vcc12v_dcin: vcc12v-dcin {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
vcc3v3_pcie30: vcc3v3-pcie30 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&vcc3v3_pcie30_en>;
gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; //hugsun gpio1_c4
startup-delay-us = <10000>;
vin-supply = <&vcc12v_dcin>;
};
vcc5v0_sys: vcc5v0-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcin>;
};
vcc5v0_host: vcc5v0-host-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_sys>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
};
vcc5v0_otg: vcc5v0-otg-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_otg";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_sys>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_otg_en>;
};
vcc_sd: sd-regulator {
compatible = "regulator-fixed";
gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_pwr>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
regulator-name = "vcc_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <100000>;
vin-supply = <&vcc12v_dcin>;
};
vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 {
compatible = "regulator-fixed";
regulator-name = "vcc_1v1_nldo_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
vin-supply = <&vcc5v0_sys>;
};
RTL8111HS_pcie30: RTL8111HS-pcie30 {
compatible = "regulator-fixed";
regulator-name = "RTL8111HS_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio2 RK_PC4 GPIO_ACTIVE_HIGH>;
startup-delay-us = <5000>;
vin-supply = <&vcc12v_dcin>;
};
modem {
compatible = "rockchip,modem";
status = "okay";
//power-on_gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
reset_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //GPIO_C4
pinctrl-names = "default";
pinctrl-0 = <&modem_pwr>;
};
ext_cam_clk: external-camera-clock {
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "CLK_CAMERA_24MHZ";
#clock-cells = <0>;
};
wireless_bluetooth: wireless-bluetooth {
compatible = "bluetooth-platdata";
clocks = <&hym8563>;
clock-names = "ext_clock";
uart_rts_gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart6m1_rtsn>, <&bt_gpio>;
pinctrl-1 = <&uart6_gpios>;
BT,reset_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
status = "okay";
};
wireless_wlan: wireless-wlan {
compatible = "wlan-platdata";
wifi_chip_type = "ap6275p";
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>, <&wifi_poweren_gpio>;
WIFI,host_wake_irq = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
WIFI,poweren_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
// hdmi rx start
/* Should work with at least 128MB cma reserved above. */
&hdmirx_ctrler {
status = "okay";
#sound-dai-cells = <1>;
/* Effective level used to trigger HPD: 0-low, 1-high */
hpd-trigger-level = <1>;
hdmirx-det-gpios = <&gpio1 RK_PD1 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hdmim2_rx_cec
&hdmim2_rx_hpdin
&hdmim2_rx_sda
&hdmim2_rx_scl
&hdmirx_det>;
};
//hdmirx sound
&i2s7_8ch {
status = "okay";
};
// hdmi rx end
&combphy0_ps {
status = "okay";
};
&combphy1_ps {
status = "okay";
};
&combphy2_psu {
status = "okay";
};
&gmac0 {
/* Use rgmii-rxid mode to disable rx delay inside Soc */
phy-mode = "rgmii-rxid";
clock_in_out = "output";
snps,reset-gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim
&gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus>;
tx_delay = <0x44>;
/* rx_delay = <0x4f>; */
phy-handle = <&rgmii_phy0>;
status = "okay";
};
//hdmi out 0|1 start
#if 1
&hdmi0 {
enable-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
cec-enable = "false";
split-mode;
//pinctrl-names = "default";
//pinctrl-0 = <&hdmi_enable_gpio>;
status = "okay";
};
&hdmi0_sound {
status = "okay";
};
&hdptxphy_hdmi0 {
status = "okay";
};
&route_hdmi0 {
status = "disabled";
connect = <&vp0_out_hdmi0>;
};
&hdmi0_in_vp0 {
status = "okay";
};
#endif
#if 1
&hdmi1 {
enable-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
cec-enable = "false";
//split-mode;
rockchip,split-right;
status = "okay";
};
&hdptxphy_hdmi1 {
status = "okay";
};
&hdmi1_sound {
status = "okay";
};
&route_hdmi1 {
status = "disabled";
connect = <&vp0_out_hdmi1>;
};
&hdmi1_in_vp0 {
status = "okay";
};
&hdmi0_in_vp1 {
status = "disabled";
};
&hdmi0_in_vp2 {
status = "disabled";
};
&hdmi1_in_vp1 {
status = "disabled";
};
&hdmi1_in_vp2 {
status = "disabled";
};
#endif
//dp0|1 out start
#if 1
&dp0 {
pinctrl-names = "default";
pinctrl-0 = <&DP0_HPDIN_gpio>;
hpd-gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
split-mode;
status = "okay";
};
&dp0_in_vp1 {
status = "okay";
};
&dp0_sound{
status = "okay";
};
&route_dp0 {
status = "disabled";
connect = <&vp1_out_dp0>;
};
#endif
&dp1 {
pinctrl-0 = <&dp1m0_pins>;
pinctrl-names = "default";
status = "okay";
};
&dp1_in_vp1 {
status = "okay";
};
#if 0
&dp1_sound{
status = "disabled";
};
&route_dp1 {
status = "disabled";
connect = <&vp1_out_dp1>;
};
#endif
//dp0|1 out end
/* lt6911 hdmi in */
/* lt6911 hdmi in end */
&i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c0m2_xfer>;
vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
vin-supply = <&vcc5v0_sys>;
regulator-compatible = "rk860x-reg";
regulator-name = "vdd_cpu_big0_s0";
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
regulator-ramp-delay = <2300>;
rockchip,suspend-voltage-selector = <1>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 {
compatible = "rockchip,rk8603";
reg = <0x43>;
vin-supply = <&vcc5v0_sys>;
regulator-compatible = "rk860x-reg";
regulator-name = "vdd_cpu_big1_s0";
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
regulator-ramp-delay = <2300>;
rockchip,suspend-voltage-selector = <1>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
&i2c2 {
status = "okay";
vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
vin-supply = <&vcc5v0_sys>;
regulator-compatible = "rk860x-reg";
regulator-name = "vdd_npu_s0";
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <2300>;
rockchip,suspend-voltage-selector = <1>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
&i2c3 {
status = "okay";
es8388: es8388@10 {
status = "okay";
#sound-dai-cells = <0>;
compatible = "everest,es8388", "everest,es8323";
reg = <0x10>;
clocks = <&mclkout_i2s0>;
clock-names = "mclk";
assigned-clocks = <&mclkout_i2s0>;
assigned-clock-rates = <12288000>;
pinctrl-names = "default";
pinctrl-0 = <&i2s0_mclk>;
};
};
&i2c6 {
status = "okay";
hym8563: hym8563@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "hym8563";
pinctrl-names = "default";
pinctrl-0 = <&hym8563_int>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
wakeup-source;
};
};
&i2s0_8ch {
status = "okay";
pinctrl-0 = <&i2s0_lrck
&i2s0_sclk
&i2s0_sdi0
&i2s0_sdo0>;
};
//hdmi01 sound
&i2s5_8ch {
status = "okay";
};
//hdmi02 sound
&i2s6_8ch {
status = "disabled";
};
//lt6911 sound
&i2s1_8ch {
status = "disabled";
pinctrl-0 = <&i2s1m0_lrck
&i2s1m0_sclk
&i2s1m0_sdi0>;
};
&spdif_tx2 {
status = "okay";
};
&spdif_tx5 {
status = "okay";
};
&mdio0 {
rgmii_phy0: phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
};
};
//wifi
&pcie2x1l0 {
reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
rockchip,skip-scan-in-resume;
status = "okay";
};
//RTL8111HS
&pcie2x1l1 {
reset-gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
vpcie3v3-supply = <&RTL8111HS_pcie30>;
pinctrl-0 = <&rtl8111_isolate>;
status = "okay";
};
&pcie30phy {
rockchip,pcie30-phymode = <PHY_MODE_PCIE_AGGREGATION>;
status = "okay";
};
//m.2
&pcie3x4 {
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};
&pcie3x2 {
status = "disabled";
};
&rk806single {
pinctrl-names = "default", "pmic-power-off";
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, <&rk806_dvs2_null>, <&rk806_dvs3_null>;
pinctrl-1 = <&rk806_dvs1_slp>, <&rk806_dvs2_null>, <&rk806_dvs3_null>;
regulators {
avcc_1v8_s0: PLDO_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "avcc_1v8_s0";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
};
};
&vdd_log_s0 { //fox.luo@2022.05.26 don't wake up
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <750000>;
};
};
&rockchip_suspend {
status = "okay";
rockchip,sleep-debug-en = <1>;
rockchip,virtual-poweroff = <1>;
rockchip,sleep-mode-config = <
(0
| RKPM_SLP_ARMOFF_DDRPD
)
>;
rockchip,wakeup-config = <
(0
| RKPM_CPU0_WKUP_EN
| RKPM_GPIO_WKUP_EN
)
>;
};
//rs485
&uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart0m2_xfer>;
};
//rs232
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m0_xfer>;
};
//rs232
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m0_xfer>;
};
//蓝牙
&uart6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart6m1_xfer &uart6m1_ctsn>;
};
&sdhci {
bus-width = <8>;
no-sdio;
no-sd;
non-removable;
max-frequency = <200000000>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
full-pwr-cycle-in-suspend;
status = "okay";
};
&sdmmc {
max-frequency = <150000000>;
no-sdio;
no-mmc;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
sd-uhs-sdr104;
vqmmc-supply = <&vccio_sd_s0>;
status = "okay";
};
&pinctrl {
wireless-bluetooth {
uart6_gpios: uart6-gpios {
rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
bt_gpio: bt-gpio {
rockchip,pins =
<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
};
wifi_poweren_gpio: wifi-poweren-gpio {
rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
buttons {
pwrbtn: pwrbtn {
rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
//rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
//headphone {
// hp_det: hp-det {
// rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
// };
//};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb-typec {
usbc0_int: usbc0-int {
rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
};
vcc5v0_otg_en: vcc5v0-otg-en {
rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hdmiin {
lt6911uxc_pin: lt6911uxc-pin {
rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
<4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
<1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
hdmirx_det: hdmirx-det {
rockchip,pins = <1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pcie {
vcc3v3_pcie30_en: vcc3v3-pcie30-en {
rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdmmc-pwr {
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
modem {
modem_pwr: modem-pwr {
rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
<0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
rtl8111 {
rtl8111_isolate: rtl8111-isolate {
rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
hdmi_enable_gpio {
hdmi_enable_gpio: hdmi_enable_gpio{
rockchip,pins =
<3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>,
<3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
DP_HPDIN_gpio {
DP0_HPDIN_gpio: DP_HPDIN_gpio{
rockchip,pins =
<3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
//type-c0
&u2phy0 {
status = "okay";
};
&u2phy1 {
status = "okay";
};
//usb2.0 host0
&u2phy2 {
status = "okay";
};
//usb2.0 host1
&u2phy3 {
status = "okay";
};
&u2phy0_otg {
//rockchip,sel-pipe-phystatus;
vbus-supply = <&vcc5v0_otg>;
status = "okay";
};
&u2phy1_otg {
phy-supply = <&vcc5v0_host>;
status = "okay";
};
&u2phy2_host {
phy-supply = <&vcc5v0_host>;
status = "okay";
};
&u2phy3_host {
phy-supply = <&vcc5v0_host>;
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};
&usbdp_phy0 {
rockchip,dp-lane-mux = < 0 1 >;
status = "okay";
};
&usbdp_phy0_dp {
status = "okay";
};
&usbdp_phy0_u3 {
status = "okay";
};
&usbdp_phy1 {
rockchip,dp-lane-mux = < 0 1 >;
status = "okay";
};
&usbdp_phy1_dp {
status = "okay";
};
&usbdp_phy1_u3 {
maximum-speed = "high-speed";
status = "okay";
};
&usbdrd3_0 {
status = "okay";
};
&usbdrd3_1 {
status = "okay";
};
&usbdrd_dwc3_0 {
dr_mode = "otg";
extcon = <&u2phy0>;
status = "okay";
};
&usbdrd_dwc3_1 {
dr_mode = "host";
maximum-speed = "high-speed";
status = "okay";
};
&usbhost3_0 {
status = "okay";
};
&usbhost_dwc3_0 {
dr_mode = "host";
status = "okay";
};
&vdd_vdenc_s0 {
regulator-init-microvolt = <750000>;
};