MppSysCfg is used to config and query mpp gloabl parameters.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
Change-Id: I132746e07b55040b582878adaef209ce73147da1
Platform: General
Error case:
When info changing, setting the output format to fbc
causes buffer usage exceptions.
Solution:
Add the MPP_DEC_SET_FRAME_INFO command.
From: Product Department 2 czl
Change-Id: I779ca93b461bf220d64e3d4846128ce2f67ffc89
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
Deblur_en is more generic for upper application.
Change-Id: Ibe4e0f81851fdbbe8fb8b7d840a4a9380e0403b1
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
1. Add cu_qp_delta_depth cfg
2. Configure AQ regs for H.265
3. Configure regs according to scene mode
4. Support fixed frame level QP
5. Add RDO lambda table index
6. Update stat info for HEVC
7. Add tuning code for H.264 encoder
Change-Id: Id7dae4ed55e1b94622aee72cfce8f24c833d00e1
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
Now there are 2 mode for downscale thumbnail frame buffer
1.MPP_FRAME_THUMBNAIL_MIXED (already use on RK3528 box):
Each buffer contains original output frame and 2x2 downscale
small frame, small image's buffer offset will be set in frame
meta info;
2.MPP_FRAME_THUMBNAIL_ONLY (newly added for rk3576 8K video):
for rk3576: vop & gpu does not support 8K frame,
in this case, mpp use 4K downscale buffer as decoder output
Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com>
Change-Id: I3acf9486a657fa3e999ca16140f40b2a01ebcaf4
sync_begin - cache invalidate, should be called before cpu read
sync_end - cache flush, should be called after cpu write
MppBuffer sync flow:
1. hw access
2. sync_begin
3. cpu access (read / write)
4. sync_end
5. hw access
NOTE: readonly option is faster for read only buffer.
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I253a6139e9bb30808c07075d64f17b5cfad8519a
1. add num of inter/intra different size predicted block info
2. add start qp info
3. add output pskip frame indicator
4. add SSE info
Change-Id: I664f0f87b862bf1c27b43f67c5c3e4b8b060c5b0
Signed-off-by: yanjun.liao <yanjun.liao@rock-chips.com>
fix MPP_FRAME_HDR bit mask conflicts with MPP_FRAME_FMT_LE_MASK
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I3a0df734f8cbc36da625d4b1a70658069809774f
Issue is introduced when user configs log2_max_frm_num.
1. use MppEncH264HwCfg instead of hw_poc_type.
2. slice_write can only use corresponding hardware config.
Signed-off-by: xueman.ruan <xueman.ruan@rock-chips.com>
Change-Id: Id5f3622512075eedc1e9dc99636c3f0dff43d6f1
1. Define more decoder frame error level.
2. Setup errInfo according to error type and level
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I7d0e87d19fc5b24808cda6b2b1bdaa1e60d091f6
Add parameters required for intra refresh
Add rate control corresponding to intra refresh
Change-Id: I6dbaf70e3c50cd0debf909ded9fb5c4f30df26ec
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
1. add viewid in struct VideoFrame for mvc output
2. modify reserved to int type for future
Signed-off-by: He Hua <hh@rock-chips.com>
Change-Id: Ib95999221bef8c9d385b70736ab7978926a78836
