mirror of
https://github.com/nyanmisaka/mpp.git
synced 2026-01-24 01:10:39 +01:00
fix[vdpp]: Fix vdpp blk_size calculation.
update hsd_mode/vsd_mode before blk_size calculation, fix the mismatch between hsd_mode/vsd_mode registers and blk_size registers. Change-Id: I49215f99430382ec8f59adad3cd81b9f9ab736d8 Signed-off-by: akira.wang <akira.wang@rock-chips.com>
This commit is contained in:
parent
a091f3ae02
commit
f18ff4b254
1 changed files with 5 additions and 6 deletions
|
|
@ -356,6 +356,9 @@ static void set_hist_to_vdpp2_reg(struct vdpp2_params* src_params, struct vdpp2_
|
|||
dci_vsd_mode = VDPP_DCI_VSD_MODE_2;
|
||||
}
|
||||
|
||||
dci_vsd_mode = (src_params->working_mode == VDPP_WORK_MODE_VEP) ? 0 : dci_vsd_mode;
|
||||
dci_hsd_mode = (src_params->working_mode == VDPP_WORK_MODE_VEP) ? 0 : dci_hsd_mode;
|
||||
|
||||
switch (dci_hsd_mode) {
|
||||
case VDPP_DCI_HSD_DISABLE:
|
||||
hsd_sample_num = 2;
|
||||
|
|
@ -403,12 +406,8 @@ static void set_hist_to_vdpp2_reg(struct vdpp2_params* src_params, struct vdpp2_
|
|||
dst_reg->dci.reg2.sw_vdpp_src_pic_height = MPP_ALIGN_DOWN(src_params->src_height, vsd_sample_num) - 1;
|
||||
dst_reg->dci.reg3.sw_dci_data_format = src_params->dci_format;
|
||||
dst_reg->dci.reg3.sw_dci_csc_range = src_params->dci_csc_range;
|
||||
dst_reg->dci.reg3.sw_dci_vsd_mode = (src_params->working_mode == VDPP_WORK_MODE_VEP)
|
||||
? 0
|
||||
: dci_vsd_mode;
|
||||
dst_reg->dci.reg3.sw_dci_hsd_mode = (src_params->working_mode == VDPP_WORK_MODE_VEP)
|
||||
? 0
|
||||
: dci_hsd_mode;
|
||||
dst_reg->dci.reg3.sw_dci_vsd_mode = dci_vsd_mode;
|
||||
dst_reg->dci.reg3.sw_dci_hsd_mode = dci_hsd_mode;
|
||||
dst_reg->dci.reg3.sw_dci_alpha_swap = src_params->dci_alpha_swap;
|
||||
dst_reg->dci.reg3.sw_dci_rb_swap = src_params->dci_rbuv_swap;
|
||||
dst_reg->dci.reg3.sw_dci_blk_hsize = sw_dci_blk_hsize;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue