diff --git a/mpp/codec/dec/h265/h265d_parser.c b/mpp/codec/dec/h265/h265d_parser.c index 0e4c2e1a..00de5e7c 100644 --- a/mpp/codec/dec/h265/h265d_parser.c +++ b/mpp/codec/dec/h265/h265d_parser.c @@ -866,6 +866,8 @@ static RK_S32 hls_slice_header(HEVCContext *s) if (numbits > 0) READ_BITS(gb, numbits, &rps_idx); + if (sh->short_term_rps != &s->sps->st_rps[rps_idx]) + s->rps_need_upate = 1; sh->short_term_rps = &s->sps->st_rps[rps_idx]; } @@ -2071,6 +2073,7 @@ MPP_RET h265d_parse(void *ctx, HalDecTask *task) s->task->syntax.number = 1; s->task->valid = 1; s->ps_need_upate = 0; + s->rps_need_upate = 0; } if (s->eos) { h265d_flush(ctx); @@ -2345,8 +2348,10 @@ MPP_RET h265d_callback(void *ctx, void *err_info) } } - if (!task_dec->flags.parse_err) + if (!task_dec->flags.parse_err) { s->ps_need_upate = 0; + s->rps_need_upate = 0; + } (void) err_info; diff --git a/mpp/codec/dec/h265/h265d_parser.h b/mpp/codec/dec/h265/h265d_parser.h index 873f117d..75d06be2 100644 --- a/mpp/codec/dec/h265/h265d_parser.h +++ b/mpp/codec/dec/h265/h265d_parser.h @@ -647,6 +647,7 @@ typedef struct HEVCContext { RK_U8 pre_pps_id; RK_U8 ps_need_upate; RK_U8 sps_need_upate; + RK_U8 rps_need_upate; /*temporary storage for slice_cut_param*/ RK_U32 start_bit; diff --git a/mpp/codec/dec/h265/h265d_parser2_syntax.c b/mpp/codec/dec/h265/h265d_parser2_syntax.c index 6a43bd19..029de741 100644 --- a/mpp/codec/dec/h265/h265d_parser2_syntax.c +++ b/mpp/codec/dec/h265/h265d_parser2_syntax.c @@ -165,8 +165,9 @@ static void fill_picture_parameters(const HEVCContext *h, pp->slice_segment_header_extension_present_flag = pps->slice_header_extension_present_flag; pp->CurrPicOrderCntVal = h->poc; pp->ps_update_flag = h->ps_need_upate; + pp->rps_update_flag = h->rps_need_upate || h->ps_need_upate; - if (pp->ps_update_flag) { + if (pp->rps_update_flag) { for (i = 0; i < 32; i++) { pp->sps_lt_rps[i].lt_ref_pic_poc_lsb = sps->lt_ref_pic_poc_lsb_sps[i]; pp->sps_lt_rps[i].used_by_curr_pic_lt_flag = sps->used_by_curr_pic_lt_sps_flag[i]; diff --git a/mpp/codec/dec/h265/h265d_ps.c b/mpp/codec/dec/h265/h265d_ps.c index 19def8da..3f8e8a69 100644 --- a/mpp/codec/dec/h265/h265d_ps.c +++ b/mpp/codec/dec/h265/h265d_ps.c @@ -264,6 +264,7 @@ int mpp_hevc_decode_short_term_rps(HEVCContext *s, ShortTermRPS *rps, } } } + s->rps_need_upate = 1; return 0; __BITREAD_ERR: return MPP_ERR_STREAM; diff --git a/mpp/common/h265d_syntax.h b/mpp/common/h265d_syntax.h index 1706317b..98354c59 100644 --- a/mpp/common/h265d_syntax.h +++ b/mpp/common/h265d_syntax.h @@ -202,6 +202,7 @@ typedef struct _DXVA_PicParams_HEVC { UCHAR scaling_list_data_present_flag; UCHAR ps_update_flag; + UCHAR rps_update_flag; } DXVA_PicParams_HEVC, *LPDXVA_PicParams_HEVC; /* HEVC Quantizatiuon Matrix structure */ diff --git a/mpp/hal/rkdec/h265d/hal_h265d_com.c b/mpp/hal/rkdec/h265d/hal_h265d_com.c index 1a12ff6d..4fbb9191 100644 --- a/mpp/hal/rkdec/h265d/hal_h265d_com.c +++ b/mpp/hal/rkdec/h265d/hal_h265d_com.c @@ -312,7 +312,8 @@ RK_S32 hal_h265d_slice_hw_rps(void *dxva, void *rps_buf, void* sw_rps_buf, RK_U3 RK_S32 fifo_len = 400; RK_S32 i = 0, j = 0; h265d_dxva2_picture_context_t *dxva_cxt = (h265d_dxva2_picture_context_t*)dxva; - if (!dxva_cxt->pp.ps_update_flag) { + + if (!dxva_cxt->pp.rps_update_flag) { if (fast_mode) { memcpy(rps_buf, sw_rps_buf, fifo_len * sizeof(RK_U64)); } diff --git a/mpp/hal/rkdec/h265d/hal_h265d_vdpu383.c b/mpp/hal/rkdec/h265d/hal_h265d_vdpu383.c index 0ab4466a..0e8e94a3 100644 --- a/mpp/hal/rkdec/h265d/hal_h265d_vdpu383.c +++ b/mpp/hal/rkdec/h265d/hal_h265d_vdpu383.c @@ -774,7 +774,7 @@ static RK_S32 hal_h265d_vdpu383_rps(void *dxva, void *rps_buf, void* sw_rps_buf, RK_S32 i = 0, j = 0; h265d_dxva2_picture_context_t *dxva_ctx = (h265d_dxva2_picture_context_t*)dxva; - if (!dxva_ctx->pp.ps_update_flag) { + if (!dxva_ctx->pp.rps_update_flag) { if (fast_mode) { memcpy(rps_buf, sw_rps_buf, fifo_len * sizeof(RK_U64)); } diff --git a/mpp/hal/rkdec/h265d/hal_h265d_vdpu384a.c b/mpp/hal/rkdec/h265d/hal_h265d_vdpu384a.c index d0838f46..21f997da 100644 --- a/mpp/hal/rkdec/h265d/hal_h265d_vdpu384a.c +++ b/mpp/hal/rkdec/h265d/hal_h265d_vdpu384a.c @@ -370,7 +370,7 @@ static RK_S32 hal_h265d_v345_output_pps_packet(void *hal, void *dxva) width = (dxva_ctx->pp.PicWidthInMinCbsY << log2_min_cb_size); height = (dxva_ctx->pp.PicHeightInMinCbsY << log2_min_cb_size); - mpp_set_bitput_ctx(&bp, pps_packet, 22); // 22*64bits + mpp_set_bitput_ctx(&bp, pps_packet, SPSPPS_ALIGNED_SIZE / 8); if (dxva_ctx->pp.ps_update_flag) { mpp_put_bits(&bp, dxva_ctx->pp.vps_id, 4); @@ -573,7 +573,9 @@ static RK_S32 hal_h265d_v345_output_pps_packet(void *hal, void *dxva) for (i = 0; i < 22; i++) mpp_put_bits(&bp, row_height[i], 12); } - { + + /* update rps */ + if (dxva_ctx->pp.rps_update_flag) { Short_SPS_RPS_HEVC *cur_st_rps_ptr = &dxva_ctx->pp.cur_st_rps; for (i = 0; i < 32; i ++) { @@ -598,8 +600,8 @@ static RK_S32 hal_h265d_v345_output_pps_packet(void *hal, void *dxva) mpp_put_bits(&bp, 0, 16); mpp_put_bits(&bp, 0, 1); } + mpp_put_align(&bp, 64, 0);//128 } - mpp_put_align(&bp, 64, 0);//128 memcpy(pps_ptr, reg_ctx->pps_buf, SPSPPS_ALIGNED_SIZE); } /* --- end spspps data ------*/ @@ -633,7 +635,7 @@ static RK_S32 hal_h265d_v345_output_pps_packet(void *hal, void *dxva) char *cur_fname = "global_cfg.dat"; memset(dump_cur_fname_path, 0, sizeof(dump_cur_fname_path)); sprintf(dump_cur_fname_path, "%s/%s", dump_cur_dir, cur_fname); - dump_data_to_file(dump_cur_fname_path, (void *)bp.pbuf, 64 * bp.index + bp.bitpos, 128, 0); + dump_data_to_file(dump_cur_fname_path, (void *)bp.pbuf, 18*128, 128, 0); } #endif @@ -827,7 +829,7 @@ static MPP_RET hal_h265d_vdpu384a_gen_regs(void *hal, HalTaskInfo *syn) #ifdef DUMP_VDPU384A_DATAS { memset(dump_cur_dir, 0, sizeof(dump_cur_dir)); - sprintf(dump_cur_dir, "hevc/Frame%04d", dump_cur_frame); + sprintf(dump_cur_dir, "/data/hevc/Frame%04d", dump_cur_frame); if (access(dump_cur_dir, 0)) { if (mkdir(dump_cur_dir)) mpp_err_f("error: mkdir %s\n", dump_cur_dir); @@ -1088,7 +1090,7 @@ static MPP_RET hal_h265d_vdpu384a_gen_regs(void *hal, HalTaskInfo *syn) /* pps */ hw_regs->common_addr.reg131_gbl_base = reg_ctx->bufs_fd; - hw_regs->h265d_paras.reg67_global_len = 0xc; //22 * 8; + hw_regs->h265d_paras.reg67_global_len = SPSPPS_ALIGNED_SIZE / 16; mpp_dev_set_reg_offset(reg_ctx->dev, 131, reg_ctx->spspps_offset);