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refactor[hal_avs2d]: Extract the shared parts into common

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Platform: General
Spec: avs2d

Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
Change-Id: I497a193051d673314e05344b9939071a45b8c559
This commit is contained in:
Hongjin Li 2025-12-17 15:58:55 +08:00
parent bcc15421e3
commit 2af3c91b0c
5 changed files with 381 additions and 598 deletions
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345
mpp/hal/rkdec/avs2d/hal_avs2d_com.c
View file

@ -4,3 +4,348 @@
*/
#define MODULE_TAG "hal_avs2d_com"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <dlfcn.h>
#include <unistd.h>
#include "mpp_mem.h"
#include "mpp_env.h"
#include "mpp_platform.h"
#include "mpp_common.h"
#include "mpp_log.h"
#include "vdpu38x_com.h"
#include "hal_avs2d_global.h"
#include "hal_avs2d_ctx.h"
#include "mpp_bitput.h"
MPP_RET hal_avs2d_vdpu_deinit(void *hal)
{
Avs2dHalCtx_t *p_hal = (Avs2dHalCtx_t *)hal;
Avs2dRkvRegCtx *reg_ctx = (Avs2dRkvRegCtx *)p_hal->reg_ctx;
RK_U32 i, loop;
MPP_RET ret = MPP_OK;
AVS2D_HAL_TRACE("In.");
INP_CHECK(ret, NULL == reg_ctx);
//!< malloc buffers
loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1;
for (i = 0; i < loop; i++) {
if (reg_ctx->rcb_buf[i]) {
mpp_buffer_put(reg_ctx->rcb_buf[i]);
reg_ctx->rcb_buf[i] = NULL;
}
MPP_FREE(reg_ctx->reg_buf[i].regs);
}
vdpu38x_rcb_calc_deinit(reg_ctx->rcb_ctx);
if (reg_ctx->bufs) {
mpp_buffer_put(reg_ctx->bufs);
reg_ctx->bufs = NULL;
}
if (p_hal->cmv_bufs) {
hal_bufs_deinit(p_hal->cmv_bufs);
p_hal->cmv_bufs = NULL;
}
MPP_FREE(reg_ctx->shph_dat);
MPP_FREE(reg_ctx->scalist_dat);
MPP_FREE(p_hal->reg_ctx);
__RETURN:
AVS2D_HAL_TRACE("Out. ret %d", ret);
return ret;
}
MPP_RET hal_avs2d_vdpu38x_prepare_header(Avs2dHalCtx_t *p_hal, RK_U8 *data, RK_U32 len)
{
Avs2dSyntax_t *syntax = &p_hal->syntax;
PicParams_Avs2d *pp = &syntax->pp;
AlfParams_Avs2d *alfp = &syntax->alfp;
RefParams_Avs2d *refp = &syntax->refp;
WqmParams_Avs2d *wqmp = &syntax->wqmp;
RK_U64 *bit_buf = (RK_U64 *)data;
BitputCtx_t bp;
RK_U32 i, j;
memset(data, 0, len);
mpp_set_bitput_ctx(&bp, bit_buf, len);
//!< sequence header syntax
mpp_put_bits(&bp, pp->chroma_format_idc, 2);
mpp_put_bits(&bp, pp->pic_width_in_luma_samples, 16);
mpp_put_bits(&bp, pp->pic_height_in_luma_samples, 16);
mpp_put_bits(&bp, pp->bit_depth_luma_minus8, 3);
mpp_put_bits(&bp, pp->bit_depth_chroma_minus8, 3);
mpp_put_bits(&bp, pp->lcu_size, 3);
mpp_put_bits(&bp, pp->progressive_sequence, 1);
mpp_put_bits(&bp, pp->field_coded_sequence, 1);
mpp_put_bits(&bp, pp->secondary_transform_enable_flag, 1);
mpp_put_bits(&bp, pp->sample_adaptive_offset_enable_flag, 1);
mpp_put_bits(&bp, pp->adaptive_loop_filter_enable_flag, 1);
mpp_put_bits(&bp, pp->pmvr_enable_flag, 1);
mpp_put_bits(&bp, pp->cross_slice_loopfilter_enable_flag, 1);
//!< picture header syntax
mpp_put_bits(&bp, pp->picture_type, 3);
mpp_put_bits(&bp, refp->ref_pic_num, 3);
mpp_put_bits(&bp, pp->scene_reference_enable_flag, 1);
mpp_put_bits(&bp, pp->bottom_field_picture_flag, 1);
mpp_put_bits(&bp, pp->fixed_picture_qp, 1);
mpp_put_bits(&bp, pp->picture_qp, 7);
mpp_put_bits(&bp, pp->loop_filter_disable_flag, 1);
mpp_put_bits(&bp, pp->alpha_c_offset, 5);
mpp_put_bits(&bp, pp->beta_offset, 5);
//!< weight quant param
mpp_put_bits(&bp, wqmp->chroma_quant_param_delta_cb, 6);
mpp_put_bits(&bp, wqmp->chroma_quant_param_delta_cr, 6);
mpp_put_bits(&bp, wqmp->pic_weight_quant_enable_flag, 1);
//!< alf param
mpp_put_bits(&bp, alfp->enable_pic_alf_y, 1);
mpp_put_bits(&bp, alfp->enable_pic_alf_cb, 1);
mpp_put_bits(&bp, alfp->enable_pic_alf_cr, 1);
mpp_put_bits(&bp, alfp->alf_filter_num_minus1, 4);
for (i = 0; i < 16; i++)
mpp_put_bits(&bp, alfp->alf_coeff_idx_tab[i], 4);
for (i = 0; i < 16; i++)
for (j = 0; j < 9; j++)
mpp_put_bits(&bp, alfp->alf_coeff_y[i][j], 7);
for (j = 0; j < 9; j++)
mpp_put_bits(&bp, alfp->alf_coeff_cb[j], 7);
for (j = 0; j < 9; j++)
mpp_put_bits(&bp, alfp->alf_coeff_cr[j], 7);
/* other flags */
mpp_put_bits(&bp, pp->multi_hypothesis_skip_enable_flag, 1);
mpp_put_bits(&bp, pp->dual_hypothesis_prediction_enable_flag, 1);
mpp_put_bits(&bp, pp->weighted_skip_enable_flag, 1);
mpp_put_bits(&bp, pp->asymmetrc_motion_partitions_enable_flag, 1);
mpp_put_bits(&bp, pp->nonsquare_quadtree_transform_enable_flag, 1);
mpp_put_bits(&bp, pp->nonsquare_intra_prediction_enable_flag, 1);
//!< picture reference params
mpp_put_bits(&bp, pp->cur_poc, 32);
for (i = 0; i < 8; i++)
mpp_put_bits(&bp, (i < refp->ref_pic_num) ? refp->ref_poc_list[i] : 0, 32);
for (i = 0; i < 8; i++)
mpp_put_bits(&bp, (i < refp->ref_pic_num) ? pp->field_coded_sequence : 0, 1);
for (i = 0; i < 8; i++)
mpp_put_bits(&bp, (i < refp->ref_pic_num) ? pp->bottom_field_picture_flag : 0, 1);
for (i = 0; i < 8; i++)
mpp_put_bits(&bp, (i < refp->ref_pic_num), 1);
mpp_put_align(&bp, 64, 0);
#ifdef DUMP_VDPU38X_DATAS
{
char *cur_fname = "global_cfg.dat";
memset(vdpu38x_dump_cur_fname_path, 0, sizeof(vdpu38x_dump_cur_fname_path));
sprintf(vdpu38x_dump_cur_fname_path, "%s/%s", vdpu38x_dump_cur_dir, cur_fname);
vdpu38x_dump_data_to_file(vdpu38x_dump_cur_fname_path, (void *)bp.pbuf,
64 * bp.index + bp.bitpos, 128, 0, 0);
}
#endif
return MPP_OK;
}
MPP_RET hal_avs2d_vdpu38x_prepare_scalist(Avs2dHalCtx_t *p_hal, RK_U8 *data, RK_U32 len)
{
Avs2dSyntax_t *syntax = &p_hal->syntax;
WqmParams_Avs2d *wqmp = &syntax->wqmp;
RK_U32 i = 0;
RK_U32 n = 0;
if (!wqmp->pic_weight_quant_enable_flag)
return MPP_OK;
memset(data, 0, len);
/* dump by block4x4, vectial direction */
for (i = 0; i < 4; i++) {
data[n++] = wqmp->wq_matrix[0][i + 0];
data[n++] = wqmp->wq_matrix[0][i + 4];
data[n++] = wqmp->wq_matrix[0][i + 8];
data[n++] = wqmp->wq_matrix[0][i + 12];
}
/* block8x8 */
{
RK_S32 blk4_x = 0, blk4_y = 0;
/* dump by block4x4, vectial direction */
for (blk4_x = 0; blk4_x < 8; blk4_x += 4) {
for (blk4_y = 0; blk4_y < 8; blk4_y += 4) {
RK_S32 pos = blk4_y * 8 + blk4_x;
for (i = 0; i < 4; i++) {
data[n++] = wqmp->wq_matrix[1][pos + i + 0];
data[n++] = wqmp->wq_matrix[1][pos + i + 8];
data[n++] = wqmp->wq_matrix[1][pos + i + 16];
data[n++] = wqmp->wq_matrix[1][pos + i + 24];
}
}
}
}
return MPP_OK;
}
RK_S32 hal_avs2d_get_frame_fd(Avs2dHalCtx_t *p_hal, RK_S32 idx)
{
RK_S32 ret_fd = 0;
MppBuffer mbuffer = NULL;
mpp_buf_slot_get_prop(p_hal->frame_slots, idx, SLOT_BUFFER, &mbuffer);
ret_fd = mpp_buffer_get_fd(mbuffer);
return ret_fd;
}
RK_S32 hal_avs2d_get_packet_fd(Avs2dHalCtx_t *p_hal, RK_S32 idx)
{
RK_S32 ret_fd = 0;
MppBuffer mbuffer = NULL;
mpp_buf_slot_get_prop(p_hal->packet_slots, idx, SLOT_BUFFER, &mbuffer);
ret_fd = mpp_buffer_get_fd(mbuffer);
return ret_fd;
}
MPP_RET hal_avs2d_set_up_colmv_buf(void *hal)
{
MPP_RET ret = MPP_OK;
Avs2dHalCtx_t *p_hal = (Avs2dHalCtx_t *)hal;
Avs2dSyntax_t *syntax = &p_hal->syntax;
PicParams_Avs2d *pp = &syntax->pp;
RK_U32 ctu_size = 1 << (p_hal->syntax.pp.lcu_size);
RK_S32 mv_size = hal_h265d_avs2d_calc_mv_size(pp->pic_width_in_luma_samples,
pp->pic_height_in_luma_samples *
(1 + pp->field_coded_sequence),
ctu_size);
AVS2D_HAL_TRACE("mv_size %d", mv_size);
if (p_hal->mv_size < (RK_U32)mv_size) {
size_t size = mv_size;
if (p_hal->cmv_bufs) {
hal_bufs_deinit(p_hal->cmv_bufs);
p_hal->cmv_bufs = NULL;
}
hal_bufs_init(&p_hal->cmv_bufs);
if (p_hal->cmv_bufs == NULL) {
mpp_err_f("colmv bufs init fail");
ret = MPP_ERR_INIT;
goto __RETURN;
}
p_hal->mv_size = mv_size;
p_hal->mv_count = mpp_buf_slot_get_count(p_hal->frame_slots);
hal_bufs_setup(p_hal->cmv_bufs, p_hal->mv_count, 1, &size);
}
__RETURN:
return ret;
}
RK_U8 hal_avs2d_fetch_data(RK_U32 fmt, RK_U8 *line, RK_U32 num)
{
RK_U32 offset = 0;
RK_U32 value = 0;
if (fmt == MPP_FMT_YUV420SP_10BIT) {
offset = (num * 2) & 7;
value = (line[num * 10 / 8] >> offset) |
(line[num * 10 / 8 + 1] << (8 - offset));
value = (value & 0x3ff) >> 2;
} else if (fmt == MPP_FMT_YUV420SP) {
value = line[num];
}
return value;
}
MPP_RET hal_avs2d_vdpu_dump_yuv(void *hal, HalTaskInfo *task)
{
Avs2dHalCtx_t *p_hal = (Avs2dHalCtx_t *)hal;
MppFrameFormat fmt = MPP_FMT_YUV420SP;
RK_U32 vir_w = 0;
RK_U32 vir_h = 0;
FILE *fp_stream = NULL;
char name[50];
MppBuffer buffer = NULL;
MppFrame frame;
void *base = NULL;
RK_U32 i, j;
MPP_RET ret = MPP_OK;
ret = mpp_buf_slot_get_prop(p_hal->frame_slots, task->dec.output, SLOT_FRAME_PTR, &frame);
if (ret != MPP_OK || frame == NULL)
mpp_log_f("failed to get frame slot %d", task->dec.output);
ret = mpp_buf_slot_get_prop(p_hal->frame_slots, task->dec.output, SLOT_BUFFER, &buffer);
if (ret != MPP_OK || buffer == NULL)
mpp_log_f("failed to get frame buffer slot %d", task->dec.output);
AVS2D_HAL_TRACE("frame slot %d, fd %d\n", task->dec.output, mpp_buffer_get_fd(buffer));
base = mpp_buffer_get_ptr(buffer);
vir_w = mpp_frame_get_hor_stride(frame);
vir_h = mpp_frame_get_ver_stride(frame);
fmt = mpp_frame_get_fmt(frame);
snprintf(name, sizeof(name), "/data/tmp/rkv_out_%dx%d_nv12_%03d.yuv", vir_w, vir_h,
p_hal->frame_no);
fp_stream = fopen(name, "wb");
/* if format is fbc, write fbc header first */
if (MPP_FRAME_FMT_IS_FBC(fmt)) {
RK_U32 header_size = 0;
header_size = vir_w * vir_h / 16;
fwrite(base, 1, header_size, fp_stream);
base += header_size;
}
if (fmt != MPP_FMT_YUV420SP_10BIT) {
fwrite(base, 1, vir_w * vir_h * 3 / 2, fp_stream);
} else {
RK_U8 tmp = 0;
for (i = 0; i < vir_h; i++) {
for (j = 0; j < vir_w; j++) {
tmp = hal_avs2d_fetch_data(fmt, base, j);
fwrite(&tmp, 1, 1, fp_stream);
}
base += vir_w;
}
for (i = 0; i < vir_h / 2; i++) {
for (j = 0; j < vir_w; j++) {
tmp = hal_avs2d_fetch_data(fmt, base, j);
fwrite(&tmp, 1, 1, fp_stream);
}
base += vir_w;
}
}
fclose(fp_stream);
return ret;
}

9
mpp/hal/rkdec/avs2d/hal_avs2d_com.h
View file

@ -6,4 +6,13 @@
#ifndef HAL_AVS2D_COM_H
#define HAL_AVS2D_COM_H
MPP_RET hal_avs2d_vdpu_deinit(void *hal);
MPP_RET hal_avs2d_vdpu38x_prepare_header(Avs2dHalCtx_t *p_hal, RK_U8 *data, RK_U32 len);
MPP_RET hal_avs2d_vdpu38x_prepare_scalist(Avs2dHalCtx_t *p_hal, RK_U8 *data, RK_U32 len);
RK_S32 hal_avs2d_get_frame_fd(Avs2dHalCtx_t *p_hal, RK_S32 idx);
RK_S32 hal_avs2d_get_packet_fd(Avs2dHalCtx_t *p_hal, RK_S32 idx);
MPP_RET hal_avs2d_set_up_colmv_buf(void *hal);
RK_U8 hal_avs2d_fetch_data(RK_U32 fmt, RK_U8 *line, RK_U32 num);
MPP_RET hal_avs2d_vdpu_dump_yuv(void *hal, HalTaskInfo *task);
#endif /* HAL_AVS2D_COM_H */

122
mpp/hal/rkdec/avs2d/hal_avs2d_rkv.c
View file

@ -31,6 +31,7 @@
#include "mpp_dec_cb_param.h"
#include "vdpu34x_avs2d.h"
#include "hal_avs2d_ctx.h"
#include "hal_avs2d_com.h"
#define MAX_REF_NUM (8)
#define AVS2_RKV_SHPH_SIZE (1408 / 8) /* bytes */
@ -161,28 +162,6 @@ static MPP_RET prepare_scalist(Avs2dHalCtx_t *p_hal, RK_U8 *data, RK_U32 len)
return MPP_OK;
}
static RK_S32 get_frame_fd(Avs2dHalCtx_t *p_hal, RK_S32 idx)
{
RK_S32 ret_fd = 0;
MppBuffer mbuffer = NULL;
mpp_buf_slot_get_prop(p_hal->frame_slots, idx, SLOT_BUFFER, &mbuffer);
ret_fd = mpp_buffer_get_fd(mbuffer);
return ret_fd;
}
static RK_S32 get_packet_fd(Avs2dHalCtx_t *p_hal, RK_S32 idx)
{
RK_S32 ret_fd = 0;
MppBuffer mbuffer = NULL;
mpp_buf_slot_get_prop(p_hal->packet_slots, idx, SLOT_BUFFER, &mbuffer);
ret_fd = mpp_buffer_get_fd(mbuffer);
return ret_fd;
}
static MPP_RET init_common_regs(Vdpu34xAvs2dRegSet *regs)
{
Vdpu34xRegCommon *common = &regs->common;
@ -325,7 +304,7 @@ static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu34xAvs2dRegSet *p_regs,
RK_S32 fd = -1;
p_regs->avs2d_param.reg65_cur_top_poc = mpp_frame_get_poc(mframe);
p_regs->avs2d_param.reg66_cur_bot_poc = 0;
fd = get_frame_fd(p_hal, task_dec->output);
fd = hal_avs2d_get_frame_fd(p_hal, task_dec->output);
mpp_assert(fd >= 0);
p_regs->common_addr.reg130_decout_base = fd;
mv_buf = hal_bufs_get_buf(p_hal->cmv_bufs, task_dec->output);
@ -375,7 +354,7 @@ static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu34xAvs2dRegSet *p_regs,
ref_flag |= frm_flag << (i * 8);
p_regs->avs2d_addr.ref_base[i] = get_frame_fd(p_hal, slot_idx);
p_regs->avs2d_addr.ref_base[i] = hal_avs2d_get_frame_fd(p_hal, slot_idx);
mv_buf = hal_bufs_get_buf(p_hal->cmv_bufs, slot_idx);
p_regs->avs2d_addr.colmv_base[i] = mpp_buffer_get_fd(mv_buf->buf[0]);
@ -398,7 +377,7 @@ static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu34xAvs2dRegSet *p_regs,
mpp_buf_slot_get_prop(p_hal->frame_slots, slot_idx, SLOT_FRAME_PTR, &scene_ref);
if (scene_ref) {
p_regs->avs2d_addr.ref_base[replace_idx] = get_frame_fd(p_hal, slot_idx);
p_regs->avs2d_addr.ref_base[replace_idx] = hal_avs2d_get_frame_fd(p_hal, slot_idx);
mv_buf = hal_bufs_get_buf(p_hal->cmv_bufs, slot_idx);
p_regs->avs2d_addr.colmv_base[replace_idx] = mpp_buffer_get_fd(mv_buf->buf[0]);
p_regs->avs2d_param.reg67_098_ref_poc[replace_idx] = mpp_frame_get_poc(scene_ref);
@ -413,7 +392,7 @@ static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu34xAvs2dRegSet *p_regs,
// set rlc
{
p_regs->common_addr.reg128_rlc_base = get_packet_fd(p_hal, task_dec->input);
p_regs->common_addr.reg128_rlc_base = hal_avs2d_get_packet_fd(p_hal, task_dec->input);
AVS2D_HAL_TRACE("packet fd %d from slot %d", p_regs->common_addr.reg128_rlc_base, task_dec->input);
p_regs->common_addr.reg129_rlcwrite_base = p_regs->common_addr.reg128_rlc_base;
common->reg016_str_len = MPP_ALIGN(mpp_packet_get_length(task_dec->input_packet), 16) + 64;
@ -896,93 +875,6 @@ __RETURN:
return ret;
}
static RK_U8 fetch_data(RK_U32 fmt, RK_U8 *line, RK_U32 num)
{
RK_U32 offset = 0;
RK_U32 value = 0;
if (fmt == MPP_FMT_YUV420SP_10BIT) {
offset = (num * 2) & 7;
value = (line[num * 10 / 8] >> offset) |
(line[num * 10 / 8 + 1] << (8 - offset));
value = (value & 0x3ff) >> 2;
} else if (fmt == MPP_FMT_YUV420SP) {
value = line[num];
}
return value;
}
static MPP_RET hal_avs2d_rkv_dump_yuv(void *hal, HalTaskInfo *task)
{
MPP_RET ret = MPP_OK;
Avs2dHalCtx_t *p_hal = (Avs2dHalCtx_t *)hal;
MppFrameFormat fmt = MPP_FMT_YUV420SP;
RK_U32 vir_w = 0;
RK_U32 vir_h = 0;
RK_U32 i = 0;
RK_U32 j = 0;
FILE *fp_stream = NULL;
char name[50];
MppBuffer buffer = NULL;
MppFrame frame;
void *base = NULL;
ret = mpp_buf_slot_get_prop(p_hal->frame_slots, task->dec.output, SLOT_FRAME_PTR, &frame);
if (ret != MPP_OK || frame == NULL)
mpp_log_f("failed to get frame slot %d", task->dec.output);
ret = mpp_buf_slot_get_prop(p_hal->frame_slots, task->dec.output, SLOT_BUFFER, &buffer);
if (ret != MPP_OK || buffer == NULL)
mpp_log_f("failed to get frame buffer slot %d", task->dec.output);
AVS2D_HAL_TRACE("frame slot %d, fd %d\n", task->dec.output, mpp_buffer_get_fd(buffer));
base = mpp_buffer_get_ptr(buffer);
vir_w = mpp_frame_get_hor_stride(frame);
vir_h = mpp_frame_get_ver_stride(frame);
fmt = mpp_frame_get_fmt(frame);
snprintf(name, sizeof(name), "/data/tmp/rkv_out_%dx%d_nv12_%03d.yuv", vir_w, vir_h,
p_hal->frame_no);
fp_stream = fopen(name, "wb");
/* if format is fbc, write fbc header first */
if (MPP_FRAME_FMT_IS_FBC(fmt)) {
RK_U32 header_size = 0;
header_size = vir_w * vir_h / 16;
fwrite(base, 1, header_size, fp_stream);
base += header_size;
}
if (fmt != MPP_FMT_YUV420SP_10BIT) {
fwrite(base, 1, vir_w * vir_h * 3 / 2, fp_stream);
} else {
RK_U8 tmp = 0;
for (i = 0; i < vir_h; i++) {
for (j = 0; j < vir_w; j++) {
tmp = fetch_data(fmt, base, j);
fwrite(&tmp, 1, 1, fp_stream);
}
base += vir_w;
}
for (i = 0; i < vir_h / 2; i++) {
for (j = 0; j < vir_w; j++) {
tmp = fetch_data(fmt, base, j);
fwrite(&tmp, 1, 1, fp_stream);
}
base += vir_w;
}
}
fclose(fp_stream);
return ret;
}
MPP_RET hal_avs2d_rkv_wait(void *hal, HalTaskInfo *task)
{
MPP_RET ret = MPP_OK;
@ -1006,7 +898,7 @@ MPP_RET hal_avs2d_rkv_wait(void *hal, HalTaskInfo *task)
}
if (avs2d_hal_debug & AVS2D_HAL_DBG_OUT)
hal_avs2d_rkv_dump_yuv(hal, task);
hal_avs2d_vdpu_dump_yuv(hal, task);
if (avs2d_hal_debug & AVS2D_HAL_DBG_REG) {
FILE *fp_reg = NULL;
@ -1071,7 +963,7 @@ const MppHalApi hal_avs2d_rkvdpu = {
.ctx_size = sizeof(Avs2dRkvRegCtx),
.flag = 0,
.init = hal_avs2d_rkv_init,
.deinit = hal_avs2d_rkv_deinit,
.deinit = hal_avs2d_vdpu_deinit,
.reg_gen = hal_avs2d_rkv_gen_regs,
.start = hal_avs2d_rkv_start,
.wait = hal_avs2d_rkv_wait,

168
mpp/hal/rkdec/avs2d/hal_avs2d_vdpu382.c
View file

@ -32,6 +32,7 @@
#include "vdpu382_avs2d.h"
#include "vdpu_com.h"
#include "hal_avs2d_ctx.h"
#include "hal_avs2d_com.h"
#define MAX_REF_NUM (8)
#define AVS2_RKV_SHPH_SIZE (1408 / 8) /* bytes */
@ -50,8 +51,6 @@
#define COLMV_BYTES (16)
MPP_RET hal_avs2d_vdpu382_deinit(void *hal);
static MPP_RET prepare_header(Avs2dHalCtx_t *p_hal, RK_U8 *data, RK_U32 len)
{
RK_U32 i, j;
@ -162,28 +161,6 @@ static MPP_RET prepare_scalist(Avs2dHalCtx_t *p_hal, RK_U8 *data, RK_U32 len)
return MPP_OK;
}
static RK_S32 get_frame_fd(Avs2dHalCtx_t *p_hal, RK_S32 idx)
{
RK_S32 ret_fd = 0;
MppBuffer mbuffer = NULL;
mpp_buf_slot_get_prop(p_hal->frame_slots, idx, SLOT_BUFFER, &mbuffer);
ret_fd = mpp_buffer_get_fd(mbuffer);
return ret_fd;
}
static RK_S32 get_packet_fd(Avs2dHalCtx_t *p_hal, RK_S32 idx)
{
RK_S32 ret_fd = 0;
MppBuffer mbuffer = NULL;
mpp_buf_slot_get_prop(p_hal->packet_slots, idx, SLOT_BUFFER, &mbuffer);
ret_fd = mpp_buffer_get_fd(mbuffer);
return ret_fd;
}
static MPP_RET init_common_regs(Vdpu382Avs2dRegSet *regs)
{
Vdpu382RegCommon *common = &regs->common;
@ -382,7 +359,7 @@ static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu382Avs2dRegSet *p_regs,
RK_S32 fd = -1;
p_regs->avs2d_param.reg65_cur_top_poc = mpp_frame_get_poc(mframe);
p_regs->avs2d_param.reg66_cur_bot_poc = 0;
fd = get_frame_fd(p_hal, task_dec->output);
fd = hal_avs2d_get_frame_fd(p_hal, task_dec->output);
mpp_assert(fd >= 0);
p_regs->common_addr.reg130_decout_base = fd;
mv_buf = hal_bufs_get_buf(p_hal->cmv_bufs, task_dec->output);
@ -432,7 +409,7 @@ static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu382Avs2dRegSet *p_regs,
ref_flag |= frm_flag << (i * 8);
p_regs->avs2d_addr.ref_base[i] = get_frame_fd(p_hal, slot_idx);
p_regs->avs2d_addr.ref_base[i] = hal_avs2d_get_frame_fd(p_hal, slot_idx);
mv_buf = hal_bufs_get_buf(p_hal->cmv_bufs, slot_idx);
p_regs->avs2d_addr.colmv_base[i] = mpp_buffer_get_fd(mv_buf->buf[0]);
@ -454,7 +431,7 @@ static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu382Avs2dRegSet *p_regs,
mpp_buf_slot_get_prop(p_hal->frame_slots, slot_idx, SLOT_FRAME_PTR, &scene_ref);
if (scene_ref) {
p_regs->avs2d_addr.ref_base[replace_idx] = get_frame_fd(p_hal, slot_idx);
p_regs->avs2d_addr.ref_base[replace_idx] = hal_avs2d_get_frame_fd(p_hal, slot_idx);
mv_buf = hal_bufs_get_buf(p_hal->cmv_bufs, slot_idx);
p_regs->avs2d_addr.colmv_base[replace_idx] = mpp_buffer_get_fd(mv_buf->buf[0]);
p_regs->avs2d_param.reg67_098_ref_poc[replace_idx] = mpp_frame_get_poc(scene_ref);
@ -469,7 +446,7 @@ static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu382Avs2dRegSet *p_regs,
// set rlc
{
p_regs->common_addr.reg128_rlc_base = get_packet_fd(p_hal, task_dec->input);
p_regs->common_addr.reg128_rlc_base = hal_avs2d_get_packet_fd(p_hal, task_dec->input);
AVS2D_HAL_TRACE("packet fd %d from slot %d", p_regs->common_addr.reg128_rlc_base, task_dec->input);
p_regs->common_addr.reg129_rlcwrite_base = p_regs->common_addr.reg128_rlc_base;
common->reg016_str_len = MPP_ALIGN(mpp_packet_get_length(task_dec->input_packet), 16) + 64;
@ -489,48 +466,6 @@ static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu382Avs2dRegSet *p_regs,
return ret;
}
MPP_RET hal_avs2d_vdpu382_deinit(void *hal)
{
MPP_RET ret = MPP_OK;
RK_U32 i, loop;
Avs2dHalCtx_t *p_hal = (Avs2dHalCtx_t *)hal;
Avs2dRkvRegCtx *reg_ctx = (Avs2dRkvRegCtx *)p_hal->reg_ctx;
AVS2D_HAL_TRACE("In.");
INP_CHECK(ret, NULL == reg_ctx);
//!< malloc buffers
loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1;
for (i = 0; i < loop; i++) {
if (reg_ctx->rcb_buf[i]) {
mpp_buffer_put(reg_ctx->rcb_buf[i]);
reg_ctx->rcb_buf[i] = NULL;
}
MPP_FREE(reg_ctx->reg_buf[i].regs);
}
if (reg_ctx->bufs) {
mpp_buffer_put(reg_ctx->bufs);
reg_ctx->bufs = NULL;
}
if (p_hal->cmv_bufs) {
hal_bufs_deinit(p_hal->cmv_bufs);
p_hal->cmv_bufs = NULL;
}
MPP_FREE(reg_ctx->shph_dat);
MPP_FREE(reg_ctx->scalist_dat);
MPP_FREE(p_hal->reg_ctx);
__RETURN:
AVS2D_HAL_TRACE("Out. ret %d", ret);
return ret;
}
MPP_RET hal_avs2d_vdpu382_init(void *hal, MppHalCfg *cfg)
{
MPP_RET ret = MPP_OK;
@ -580,7 +515,7 @@ __RETURN:
(void)cfg;
return ret;
__FAILED:
hal_avs2d_vdpu382_deinit(p_hal);
hal_avs2d_vdpu_deinit(p_hal);
AVS2D_HAL_TRACE("Out. ret %d", ret);
return ret;
}
@ -963,93 +898,6 @@ __RETURN:
return ret;
}
static RK_U8 fetch_data(RK_U32 fmt, RK_U8 *line, RK_U32 num)
{
RK_U32 offset = 0;
RK_U32 value = 0;
if (fmt == MPP_FMT_YUV420SP_10BIT) {
offset = (num * 2) & 7;
value = (line[num * 10 / 8] >> offset) |
(line[num * 10 / 8 + 1] << (8 - offset));
value = (value & 0x3ff) >> 2;
} else if (fmt == MPP_FMT_YUV420SP) {
value = line[num];
}
return value;
}
static MPP_RET hal_avs2d_vdpu382_dump_yuv(void *hal, HalTaskInfo *task)
{
MPP_RET ret = MPP_OK;
Avs2dHalCtx_t *p_hal = (Avs2dHalCtx_t *)hal;
MppFrameFormat fmt = MPP_FMT_YUV420SP;
RK_U32 vir_w = 0;
RK_U32 vir_h = 0;
RK_U32 i = 0;
RK_U32 j = 0;
FILE *fp_stream = NULL;
char name[50];
MppBuffer buffer = NULL;
MppFrame frame;
void *base = NULL;
ret = mpp_buf_slot_get_prop(p_hal->frame_slots, task->dec.output, SLOT_FRAME_PTR, &frame);
if (ret != MPP_OK || frame == NULL)
mpp_log_f("failed to get frame slot %d", task->dec.output);
ret = mpp_buf_slot_get_prop(p_hal->frame_slots, task->dec.output, SLOT_BUFFER, &buffer);
if (ret != MPP_OK || buffer == NULL)
mpp_log_f("failed to get frame buffer slot %d", task->dec.output);
AVS2D_HAL_TRACE("frame slot %d, fd %d\n", task->dec.output, mpp_buffer_get_fd(buffer));
base = mpp_buffer_get_ptr(buffer);
vir_w = mpp_frame_get_hor_stride(frame);
vir_h = mpp_frame_get_ver_stride(frame);
fmt = mpp_frame_get_fmt(frame);
snprintf(name, sizeof(name), "/data/tmp/rkv_out_%dx%d_nv12_%03d.yuv", vir_w, vir_h,
p_hal->frame_no);
fp_stream = fopen(name, "wb");
/* if format is fbc, write fbc header first */
if (MPP_FRAME_FMT_IS_FBC(fmt)) {
RK_U32 header_size = 0;
header_size = vir_w * vir_h / 16;
fwrite(base, 1, header_size, fp_stream);
base += header_size;
}
if (fmt != MPP_FMT_YUV420SP_10BIT) {
fwrite(base, 1, vir_w * vir_h * 3 / 2, fp_stream);
} else {
RK_U8 tmp = 0;
for (i = 0; i < vir_h; i++) {
for (j = 0; j < vir_w; j++) {
tmp = fetch_data(fmt, base, j);
fwrite(&tmp, 1, 1, fp_stream);
}
base += vir_w;
}
for (i = 0; i < vir_h / 2; i++) {
for (j = 0; j < vir_w; j++) {
tmp = fetch_data(fmt, base, j);
fwrite(&tmp, 1, 1, fp_stream);
}
base += vir_w;
}
}
fclose(fp_stream);
return ret;
}
MPP_RET hal_avs2d_vdpu382_wait(void *hal, HalTaskInfo *task)
{
MPP_RET ret = MPP_OK;
@ -1073,7 +921,7 @@ MPP_RET hal_avs2d_vdpu382_wait(void *hal, HalTaskInfo *task)
}
if (avs2d_hal_debug & AVS2D_HAL_DBG_OUT)
hal_avs2d_vdpu382_dump_yuv(hal, task);
hal_avs2d_vdpu_dump_yuv(hal, task);
if (avs2d_hal_debug & AVS2D_HAL_DBG_REG) {
FILE *fp_reg = NULL;
@ -1138,7 +986,7 @@ const MppHalApi hal_avs2d_vdpu382 = {
.ctx_size = sizeof(Avs2dRkvRegCtx),
.flag = 0,
.init = hal_avs2d_vdpu382_init,
.deinit = hal_avs2d_vdpu382_deinit,
.deinit = hal_avs2d_vdpu_deinit,
.reg_gen = hal_avs2d_vdpu382_gen_regs,
.start = hal_avs2d_vdpu382_start,
.wait = hal_avs2d_vdpu382_wait,

335
mpp/hal/rkdec/avs2d/hal_avs2d_vdpu383.c
View file

@ -25,6 +25,7 @@
#include "vdpu_com.h"
#include "vdpu38x_com.h"
#include "hal_avs2d_ctx.h"
#include "hal_avs2d_com.h"
#define MAX_REF_NUM (8)
#define AVS2_383_SHPH_SIZE (208) /* bytes */
@ -42,160 +43,6 @@
#define COLMV_BLOCK_SIZE (16)
#define COLMV_BYTES (16)
MPP_RET hal_avs2d_vdpu383_deinit(void *hal);
static MPP_RET prepare_header(Avs2dHalCtx_t *p_hal, RK_U8 *data, RK_U32 len)
{
RK_U32 i, j;
BitputCtx_t bp;
RK_U64 *bit_buf = (RK_U64 *)data;
Avs2dSyntax_t *syntax = &p_hal->syntax;
PicParams_Avs2d *pp = &syntax->pp;
AlfParams_Avs2d *alfp = &syntax->alfp;
RefParams_Avs2d *refp = &syntax->refp;
WqmParams_Avs2d *wqmp = &syntax->wqmp;
memset(data, 0, len);
mpp_set_bitput_ctx(&bp, bit_buf, len);
//!< sequence header syntax
mpp_put_bits(&bp, pp->chroma_format_idc, 2);
mpp_put_bits(&bp, pp->pic_width_in_luma_samples, 16);
mpp_put_bits(&bp, pp->pic_height_in_luma_samples, 16);
mpp_put_bits(&bp, pp->bit_depth_luma_minus8, 3);
mpp_put_bits(&bp, pp->bit_depth_chroma_minus8, 3);
mpp_put_bits(&bp, pp->lcu_size, 3);
mpp_put_bits(&bp, pp->progressive_sequence, 1);
mpp_put_bits(&bp, pp->field_coded_sequence, 1);
mpp_put_bits(&bp, pp->secondary_transform_enable_flag, 1);
mpp_put_bits(&bp, pp->sample_adaptive_offset_enable_flag, 1);
mpp_put_bits(&bp, pp->adaptive_loop_filter_enable_flag, 1);
mpp_put_bits(&bp, pp->pmvr_enable_flag, 1);
mpp_put_bits(&bp, pp->cross_slice_loopfilter_enable_flag, 1);
//!< picture header syntax
mpp_put_bits(&bp, pp->picture_type, 3);
mpp_put_bits(&bp, refp->ref_pic_num, 3);
mpp_put_bits(&bp, pp->scene_reference_enable_flag, 1);
mpp_put_bits(&bp, pp->bottom_field_picture_flag, 1);
mpp_put_bits(&bp, pp->fixed_picture_qp, 1);
mpp_put_bits(&bp, pp->picture_qp, 7);
mpp_put_bits(&bp, pp->loop_filter_disable_flag, 1);
mpp_put_bits(&bp, pp->alpha_c_offset, 5);
mpp_put_bits(&bp, pp->beta_offset, 5);
//!< weight quant param
mpp_put_bits(&bp, wqmp->chroma_quant_param_delta_cb, 6);
mpp_put_bits(&bp, wqmp->chroma_quant_param_delta_cr, 6);
mpp_put_bits(&bp, wqmp->pic_weight_quant_enable_flag, 1);
//!< alf param
mpp_put_bits(&bp, alfp->enable_pic_alf_y, 1);
mpp_put_bits(&bp, alfp->enable_pic_alf_cb, 1);
mpp_put_bits(&bp, alfp->enable_pic_alf_cr, 1);
mpp_put_bits(&bp, alfp->alf_filter_num_minus1, 4);
for (i = 0; i < 16; i++)
mpp_put_bits(&bp, alfp->alf_coeff_idx_tab[i], 4);
for (i = 0; i < 16; i++)
for (j = 0; j < 9; j++)
mpp_put_bits(&bp, alfp->alf_coeff_y[i][j], 7);
for (j = 0; j < 9; j++)
mpp_put_bits(&bp, alfp->alf_coeff_cb[j], 7);
for (j = 0; j < 9; j++)
mpp_put_bits(&bp, alfp->alf_coeff_cr[j], 7);
/* other flags */
mpp_put_bits(&bp, pp->multi_hypothesis_skip_enable_flag, 1);
mpp_put_bits(&bp, pp->dual_hypothesis_prediction_enable_flag, 1);
mpp_put_bits(&bp, pp->weighted_skip_enable_flag, 1);
mpp_put_bits(&bp, pp->asymmetrc_motion_partitions_enable_flag, 1);
mpp_put_bits(&bp, pp->nonsquare_quadtree_transform_enable_flag, 1);
mpp_put_bits(&bp, pp->nonsquare_intra_prediction_enable_flag, 1);
//!< picture reference params
mpp_put_bits(&bp, pp->cur_poc, 32);
for (i = 0; i < 8; i++)
mpp_put_bits(&bp, (i < refp->ref_pic_num) ? refp->ref_poc_list[i] : 0, 32);
for (i = 0; i < 8; i++)
mpp_put_bits(&bp, (i < refp->ref_pic_num) ? pp->field_coded_sequence : 0, 1);
for (i = 0; i < 8; i++)
mpp_put_bits(&bp, (i < refp->ref_pic_num) ? pp->bottom_field_picture_flag : 0, 1);
for (i = 0; i < 8; i++)
mpp_put_bits(&bp, (i < refp->ref_pic_num), 1);
return MPP_OK;
}
static MPP_RET prepare_scalist(Avs2dHalCtx_t *p_hal, RK_U8 *data, RK_U32 len)
{
Avs2dSyntax_t *syntax = &p_hal->syntax;
WqmParams_Avs2d *wqmp = &syntax->wqmp;
RK_U32 i = 0;
RK_U32 n = 0;
if (!wqmp->pic_weight_quant_enable_flag)
return MPP_OK;
memset(data, 0, len);
/* dump by block4x4, vectial direction */
for (i = 0; i < 4; i++) {
data[n++] = wqmp->wq_matrix[0][i + 0];
data[n++] = wqmp->wq_matrix[0][i + 4];
data[n++] = wqmp->wq_matrix[0][i + 8];
data[n++] = wqmp->wq_matrix[0][i + 12];
}
/* block8x8 */
{
RK_S32 blk4_x = 0, blk4_y = 0;
/* dump by block4x4, vectial direction */
for (blk4_x = 0; blk4_x < 8; blk4_x += 4) {
for (blk4_y = 0; blk4_y < 8; blk4_y += 4) {
RK_S32 pos = blk4_y * 8 + blk4_x;
for (i = 0; i < 4; i++) {
data[n++] = wqmp->wq_matrix[1][pos + i + 0];
data[n++] = wqmp->wq_matrix[1][pos + i + 8];
data[n++] = wqmp->wq_matrix[1][pos + i + 16];
data[n++] = wqmp->wq_matrix[1][pos + i + 24];
}
}
}
}
return MPP_OK;
}
static RK_S32 get_frame_fd(Avs2dHalCtx_t *p_hal, RK_S32 idx)
{
RK_S32 ret_fd = 0;
MppBuffer mbuffer = NULL;
mpp_buf_slot_get_prop(p_hal->frame_slots, idx, SLOT_BUFFER, &mbuffer);
ret_fd = mpp_buffer_get_fd(mbuffer);
return ret_fd;
}
static RK_S32 get_packet_fd(Avs2dHalCtx_t *p_hal, RK_S32 idx)
{
RK_S32 ret_fd = 0;
MppBuffer mbuffer = NULL;
mpp_buf_slot_get_prop(p_hal->packet_slots, idx, SLOT_BUFFER, &mbuffer);
ret_fd = mpp_buffer_get_fd(mbuffer);
return ret_fd;
}
static void init_ctrl_regs(Vdpu383Avs2dRegSet *regs)
{
Vdpu383CtrlReg *ctrl_regs = &regs->ctrl_regs;
@ -365,7 +212,7 @@ static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu383Avs2dRegSet *regs, Ha
// set current
{
RK_S32 fd = get_frame_fd(p_hal, task_dec->output);
RK_S32 fd = hal_avs2d_get_frame_fd(p_hal, task_dec->output);
mpp_assert(fd >= 0);
@ -408,8 +255,8 @@ static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu383Avs2dRegSet *regs, Ha
mpp_buf_slot_get_prop(p_hal->frame_slots, slot_idx, SLOT_FRAME_PTR, &frame_ref);
if (frame_ref) {
regs->avs2d_addrs.reg170_185_ref_base[i] = get_frame_fd(p_hal, slot_idx);
regs->avs2d_addrs.reg195_210_payload_st_ref_base[i] = get_frame_fd(p_hal, slot_idx);
regs->avs2d_addrs.reg170_185_ref_base[i] = hal_avs2d_get_frame_fd(p_hal, slot_idx);
regs->avs2d_addrs.reg195_210_payload_st_ref_base[i] = hal_avs2d_get_frame_fd(p_hal, slot_idx);
mv_buf = hal_bufs_get_buf(p_hal->cmv_bufs, slot_idx);
regs->avs2d_addrs.reg217_232_colmv_ref_base[i] = mpp_buffer_get_fd(mv_buf->buf[0]);
}
@ -424,7 +271,7 @@ static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu383Avs2dRegSet *regs, Ha
mpp_buf_slot_get_prop(p_hal->frame_slots, slot_idx, SLOT_FRAME_PTR, &scene_ref);
if (scene_ref) {
regs->avs2d_addrs.reg170_185_ref_base[replace_idx] = get_frame_fd(p_hal, slot_idx);
regs->avs2d_addrs.reg170_185_ref_base[replace_idx] = hal_avs2d_get_frame_fd(p_hal, slot_idx);
regs->avs2d_addrs.reg195_210_payload_st_ref_base[replace_idx] = regs->avs2d_addrs.reg170_185_ref_base[replace_idx];
mv_buf = hal_bufs_get_buf(p_hal->cmv_bufs, slot_idx);
regs->avs2d_addrs.reg217_232_colmv_ref_base[replace_idx] = mpp_buffer_get_fd(mv_buf->buf[0]);
@ -436,7 +283,7 @@ static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu383Avs2dRegSet *regs, Ha
}
// set rlc
regs->common_addr.reg128_strm_base = get_packet_fd(p_hal, task_dec->input);
regs->common_addr.reg128_strm_base = hal_avs2d_get_packet_fd(p_hal, task_dec->input);
AVS2D_HAL_TRACE("packet fd %d from slot %d", regs->common_addr.reg128_strm_base, task_dec->input);
regs->avs2d_paras.reg66_stream_len = MPP_ALIGN(mpp_packet_get_length(task_dec->input_packet), 16) + 64;
@ -457,48 +304,6 @@ static MPP_RET fill_registers(Avs2dHalCtx_t *p_hal, Vdpu383Avs2dRegSet *regs, Ha
return ret;
}
MPP_RET hal_avs2d_vdpu383_deinit(void *hal)
{
MPP_RET ret = MPP_OK;
RK_U32 i, loop;
Avs2dHalCtx_t *p_hal = (Avs2dHalCtx_t *)hal;
Avs2dRkvRegCtx *reg_ctx = (Avs2dRkvRegCtx *)p_hal->reg_ctx;
AVS2D_HAL_TRACE("In.");
INP_CHECK(ret, NULL == reg_ctx);
//!< malloc buffers
loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1;
for (i = 0; i < loop; i++) {
if (reg_ctx->rcb_buf[i]) {
mpp_buffer_put(reg_ctx->rcb_buf[i]);
reg_ctx->rcb_buf[i] = NULL;
}
MPP_FREE(reg_ctx->reg_buf[i].regs);
}
if (reg_ctx->bufs) {
mpp_buffer_put(reg_ctx->bufs);
reg_ctx->bufs = NULL;
}
if (p_hal->cmv_bufs) {
hal_bufs_deinit(p_hal->cmv_bufs);
p_hal->cmv_bufs = NULL;
}
MPP_FREE(reg_ctx->shph_dat);
MPP_FREE(reg_ctx->scalist_dat);
MPP_FREE(p_hal->reg_ctx);
__RETURN:
AVS2D_HAL_TRACE("Out. ret %d", ret);
return ret;
}
MPP_RET hal_avs2d_vdpu383_init(void *hal, MppHalCfg *cfg)
{
MPP_RET ret = MPP_OK;
@ -544,49 +349,11 @@ __RETURN:
(void)cfg;
return ret;
__FAILED:
hal_avs2d_vdpu383_deinit(p_hal);
hal_avs2d_vdpu_deinit(p_hal);
AVS2D_HAL_TRACE("Out. ret %d", ret);
return ret;
}
static MPP_RET set_up_colmv_buf(void *hal)
{
MPP_RET ret = MPP_OK;
Avs2dHalCtx_t *p_hal = (Avs2dHalCtx_t *)hal;
Avs2dSyntax_t *syntax = &p_hal->syntax;
PicParams_Avs2d *pp = &syntax->pp;
RK_U32 ctu_size = 1 << (p_hal->syntax.pp.lcu_size);
RK_S32 mv_size = hal_h265d_avs2d_calc_mv_size(pp->pic_width_in_luma_samples,
pp->pic_height_in_luma_samples *
(1 + pp->field_coded_sequence),
ctu_size);
AVS2D_HAL_TRACE("mv_size %d", mv_size);
if (p_hal->cmv_bufs == NULL || p_hal->mv_size < (RK_U32)mv_size) {
size_t size = mv_size;
if (p_hal->cmv_bufs) {
hal_bufs_deinit(p_hal->cmv_bufs);
p_hal->cmv_bufs = NULL;
}
hal_bufs_init(&p_hal->cmv_bufs);
if (p_hal->cmv_bufs == NULL) {
mpp_err_f("colmv bufs init fail");
ret = MPP_ERR_INIT;
goto __RETURN;
}
p_hal->mv_size = mv_size;
p_hal->mv_count = mpp_buf_slot_get_count(p_hal->frame_slots);
hal_bufs_setup(p_hal->cmv_bufs, p_hal->mv_count, 1, &size);
}
__RETURN:
return ret;
}
MPP_RET hal_avs2d_vdpu383_gen_regs(void *hal, HalTaskInfo *task)
{
MPP_RET ret = MPP_OK;
@ -603,7 +370,7 @@ MPP_RET hal_avs2d_vdpu383_gen_regs(void *hal, HalTaskInfo *task)
goto __RETURN;
}
ret = set_up_colmv_buf(p_hal);
ret = hal_avs2d_set_up_colmv_buf(p_hal);
if (ret)
goto __RETURN;
@ -631,8 +398,8 @@ MPP_RET hal_avs2d_vdpu383_gen_regs(void *hal, HalTaskInfo *task)
memset(regs, 0, sizeof(Vdpu383Avs2dRegSet));
init_ctrl_regs(regs);
prepare_header(p_hal, reg_ctx->shph_dat, AVS2_383_SHPH_SIZE / 8);
prepare_scalist(p_hal, reg_ctx->scalist_dat, AVS2_383_SCALIST_SIZE / 8);
hal_avs2d_vdpu38x_prepare_header(p_hal, reg_ctx->shph_dat, AVS2_383_SHPH_SIZE / 8);
hal_avs2d_vdpu38x_prepare_scalist(p_hal, reg_ctx->scalist_dat, AVS2_383_SCALIST_SIZE / 8);
ret = fill_registers(p_hal, regs, task);
@ -764,84 +531,6 @@ __RETURN:
return ret;
}
static RK_U8 fetch_data(RK_U32 fmt, RK_U8 *line, RK_U32 num)
{
RK_U32 offset = 0;
RK_U32 value = 0;
if (fmt == MPP_FMT_YUV420SP_10BIT) {
offset = (num * 2) & 7;
value = (line[num * 10 / 8] >> offset) |
(line[num * 10 / 8 + 1] << (8 - offset));
value = (value & 0x3ff) >> 2;
} else if (fmt == MPP_FMT_YUV420SP) {
value = line[num];
}
return value;
}
static MPP_RET hal_avs2d_vdpu383_dump_yuv(void *hal, HalTaskInfo *task)
{
MPP_RET ret = MPP_OK;
Avs2dHalCtx_t *p_hal = (Avs2dHalCtx_t *)hal;
MppFrameFormat fmt = MPP_FMT_YUV420SP;
RK_U32 vir_w = 0;
RK_U32 vir_h = 0;
RK_U32 i = 0;
RK_U32 j = 0;
FILE *fp_stream = NULL;
char name[50];
MppBuffer buffer = NULL;
MppFrame frame;
void *base = NULL;
ret = mpp_buf_slot_get_prop(p_hal->frame_slots, task->dec.output, SLOT_FRAME_PTR, &frame);
if (ret != MPP_OK || frame == NULL)
mpp_log_f("failed to get frame slot %d", task->dec.output);
ret = mpp_buf_slot_get_prop(p_hal->frame_slots, task->dec.output, SLOT_BUFFER, &buffer);
if (ret != MPP_OK || buffer == NULL)
mpp_log_f("failed to get frame buffer slot %d", task->dec.output);
AVS2D_HAL_TRACE("frame slot %d, fd %d\n", task->dec.output, mpp_buffer_get_fd(buffer));
base = mpp_buffer_get_ptr(buffer);
vir_w = mpp_frame_get_hor_stride(frame);
vir_h = mpp_frame_get_ver_stride(frame);
fmt = mpp_frame_get_fmt(frame);
snprintf(name, sizeof(name), "/data/tmp/rkv_out_%dx%d_nv12_%03d.yuv", vir_w, vir_h,
p_hal->frame_no);
fp_stream = fopen(name, "wb");
if (fmt != MPP_FMT_YUV420SP_10BIT) {
fwrite(base, 1, vir_w * vir_h * 3 / 2, fp_stream);
} else {
RK_U8 tmp = 0;
for (i = 0; i < vir_h; i++) {
for (j = 0; j < vir_w; j++) {
tmp = fetch_data(fmt, base, j);
fwrite(&tmp, 1, 1, fp_stream);
}
base += vir_w;
}
for (i = 0; i < vir_h / 2; i++) {
for (j = 0; j < vir_w; j++) {
tmp = fetch_data(fmt, base, j);
fwrite(&tmp, 1, 1, fp_stream);
}
base += vir_w;
}
}
fclose(fp_stream);
return ret;
}
MPP_RET hal_avs2d_vdpu383_wait(void *hal, HalTaskInfo *task)
{
MPP_RET ret = MPP_OK;
@ -865,7 +554,7 @@ MPP_RET hal_avs2d_vdpu383_wait(void *hal, HalTaskInfo *task)
}
if (avs2d_hal_debug & AVS2D_HAL_DBG_OUT)
hal_avs2d_vdpu383_dump_yuv(hal, task);
hal_avs2d_vdpu_dump_yuv(hal, task);
AVS2D_HAL_TRACE("read irq_status 0x%08x\n", regs->ctrl_regs.reg15);
@ -909,7 +598,7 @@ const MppHalApi hal_avs2d_vdpu383 = {
.ctx_size = sizeof(Avs2dRkvRegCtx),
.flag = 0,
.init = hal_avs2d_vdpu383_init,
.deinit = hal_avs2d_vdpu383_deinit,
.deinit = hal_avs2d_vdpu_deinit,
.reg_gen = hal_avs2d_vdpu383_gen_regs,
.start = hal_avs2d_vdpu383_start,
.wait = hal_avs2d_vdpu383_wait,