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https://github.com/nyanmisaka/mpp.git
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f507421f8b
1. Revert codec cfg to separate h264/h265/jpeg/vp8 cfg. 2. Update enc/dec/sys cfg_test print. Signed-off-by: Herman Chen <herman.chen@rock-chips.com> Change-Id: Ida5da8a6b738fbf710e1ab590bc6b6f3438319c4
171 lines
No EOL
6.7 KiB
C
171 lines
No EOL
6.7 KiB
C
/* SPDX-License-Identifier: Apache-2.0 OR MIT */
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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*/
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#define MODULE_TAG "mpp_dec_cfg"
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#include "rk_vdec_cfg.h"
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#include <string.h>
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#include "mpp_env.h"
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#include "mpp_mem.h"
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#include "mpp_lock.h"
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#include "mpp_time.h"
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#include "mpp_debug.h"
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#include "mpp_common.h"
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#include "mpp_singleton.h"
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#include "mpp_trie.h"
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#include "mpp_cfg.h"
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#include "mpp_cfg_io.h"
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#include "mpp_dec_cfg.h"
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#define MPP_DEC_CFG_ENTRY_TABLE(prefix, ENTRY, STRCT, EHOOK, SHOOK, ALIAS) \
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CFG_DEF_START() \
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STRUCT_START(base) \
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ENTRY(prefix, u32, rk_u32, type, FLAG_BASE(0), base, type) \
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ENTRY(prefix, u32, rk_u32, coding, FLAG_AT(1), base, coding) \
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ENTRY(prefix, u32, rk_u32, hw_type, FLAG_AT(2), base, hw_type) \
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ENTRY(prefix, u32, rk_u32, batch_mode, FLAG_AT(3), base, batch_mode) \
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ENTRY(prefix, u32, rk_u32, out_fmt, FLAG_AT(4), base, out_fmt) \
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ENTRY(prefix, u32, rk_u32, fast_out, FLAG_AT(5), base, fast_out) \
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ENTRY(prefix, u32, rk_u32, fast_parse, FLAG_AT(6), base, fast_parse) \
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ENTRY(prefix, u32, rk_u32, split_parse, FLAG_AT(7), base, split_parse) \
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ENTRY(prefix, u32, rk_u32, internal_pts, FLAG_AT(8), base, internal_pts) \
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ENTRY(prefix, u32, rk_u32, sort_pts, FLAG_AT(9), base, sort_pts) \
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ENTRY(prefix, u32, rk_u32, disable_error, FLAG_AT(10), base, disable_error) \
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ENTRY(prefix, u32, rk_u32, enable_vproc, FLAG_AT(11), base, enable_vproc) \
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ENTRY(prefix, u32, rk_u32, enable_fast_play, FLAG_AT(12), base, enable_fast_play) \
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ENTRY(prefix, u32, rk_u32, enable_hdr_meta, FLAG_AT(13), base, enable_hdr_meta) \
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ENTRY(prefix, u32, rk_u32, enable_thumbnail, FLAG_AT(14), base, enable_thumbnail) \
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ENTRY(prefix, u32, rk_u32, enable_mvc, FLAG_AT(15), base, enable_mvc) \
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ENTRY(prefix, u32, rk_u32, disable_dpb_chk, FLAG_AT(16), base, disable_dpb_chk) \
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ENTRY(prefix, u32, rk_u32, disable_thread, FLAG_AT(17), base, disable_thread) \
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ENTRY(prefix, u32, rk_u32, codec_mode, FLAG_AT(18), base, codec_mode) \
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ENTRY(prefix, u32, rk_u32, dis_err_clr_mark, FLAG_AT(19), base, dis_err_clr_mark) \
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STRUCT_END(base) \
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STRUCT_START(cb) \
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ENTRY(prefix, ptr, void *, pkt_rdy_cb, FLAG_BASE(0), cb, pkt_rdy_cb) \
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ENTRY(prefix, ptr, void *, pkt_rdy_ctx, FLAG_AT(0), cb, pkt_rdy_ctx) \
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ENTRY(prefix, s32, rk_s32, pkt_rdy_cmd, FLAG_AT(0), cb, pkt_rdy_cmd) \
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ENTRY(prefix, ptr, void *, frm_rdy_cb, FLAG_AT(1), cb, frm_rdy_cb) \
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ENTRY(prefix, ptr, void *, frm_rdy_ctx, FLAG_AT(1), cb, frm_rdy_ctx) \
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ENTRY(prefix, s32, rk_s32, frm_rdy_cmd, FLAG_AT(1), cb, frm_rdy_cmd) \
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STRUCT_END(cb) \
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CFG_DEF_END()
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rk_s32 mpp_dec_cfg_set_default(void *entry, KmppObj obj, const char *caller)
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{
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MppDecCfgSet *cfg = (MppDecCfgSet *)entry;
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cfg->base.type = MPP_CTX_BUTT;
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cfg->base.coding = MPP_VIDEO_CodingUnused;
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cfg->base.hw_type = -1;
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cfg->base.fast_parse = 1;
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#ifdef ENABLE_FASTPLAY_ONCE
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cfg->base.enable_fast_play = MPP_ENABLE_FAST_PLAY_ONCE;
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#else
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cfg->base.enable_fast_play = MPP_ENABLE_FAST_PLAY;
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#endif
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(void) obj;
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(void) caller;
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return rk_ok;
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}
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#define KMPP_OBJ_NAME mpp_dec_cfg
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#define KMPP_OBJ_INTF_TYPE MppDecCfg
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#define KMPP_OBJ_IMPL_TYPE MppDecCfgSet
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#define KMPP_OBJ_SGLN_ID MPP_SGLN_DEC_CFG
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#define KMPP_OBJ_FUNC_INIT mpp_dec_cfg_set_default
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#define KMPP_OBJ_ENTRY_TABLE MPP_DEC_CFG_ENTRY_TABLE
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#define KMPP_OBJ_ACCESS_DISABLE
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#define KMPP_OBJ_HIERARCHY_ENABLE
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#include "kmpp_obj_helper.h"
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/* wrapper for old interface */
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MPP_RET mpp_dec_cfg_init(MppDecCfg *cfg)
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{
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return mpp_dec_cfg_get(cfg);
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}
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MPP_RET mpp_dec_cfg_deinit(MppDecCfg cfg)
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{
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return mpp_dec_cfg_put(cfg);
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}
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#define DEC_CFG_SET_ACCESS(func_name, in_type, cfg_type) \
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MPP_RET func_name(MppDecCfg cfg, const char *name, in_type val) \
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{ \
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if (NULL == cfg || NULL == name) { \
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mpp_err_f("invalid input cfg %p name %p\n", cfg, name); \
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return rk_nok; \
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} \
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return kmpp_obj_set_##cfg_type(cfg, name, val); \
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}
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DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_s32, RK_S32, s32);
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DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_u32, RK_U32, u32);
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DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_s64, RK_S64, s64);
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DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_u64, RK_U64, u64);
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DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_ptr, void *, ptr);
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DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_st, void *, st);
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#define DEC_CFG_GET_ACCESS(func_name, in_type, cfg_type) \
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MPP_RET func_name(MppDecCfg cfg, const char *name, in_type *val) \
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{ \
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if (NULL == cfg || NULL == name) { \
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mpp_err_f("invalid input cfg %p name %p\n", cfg, name); \
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return rk_nok; \
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} \
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return kmpp_obj_get_##cfg_type(cfg, name, val); \
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}
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DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_s32, RK_S32, s32);
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DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_u32, RK_U32, u32);
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DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_s64, RK_S64, s64);
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DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_u64, RK_U64, u64);
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DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_ptr, void *, ptr);
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DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_st, void , st);
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void mpp_dec_cfg_show(void)
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{
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MppTrie trie = kmpp_objdef_get_trie(mpp_dec_cfg_def);
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MppTrieInfo *root;
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if (!trie)
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return;
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root = mpp_trie_get_info_first(trie);
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mpp_log("dumping valid configure string start\n");
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if (root) {
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MppTrieInfo *node = root;
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rk_s32 len = mpp_trie_get_name_max(trie);
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mpp_log("%-*s %-6s | %6s | %4s | %4s\n", len, "name", "type", "offset", "size", "flag (hex)");
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do {
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if (mpp_trie_info_is_self(node))
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continue;
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if (node->ctx_len == sizeof(KmppEntry)) {
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KmppEntry *entry = (KmppEntry *)mpp_trie_info_ctx(node);
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mpp_log("%-*s %-6s | %-6d | %-4d | %-4x\n", len, mpp_trie_info_name(node),
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strof_elem_type(entry->tbl.elem_type), entry->tbl.elem_offset,
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entry->tbl.elem_size, entry->tbl.flag_offset);
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} else {
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mpp_log("%-*s size - %d\n", len, mpp_trie_info_name(node), node->ctx_len);
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}
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} while ((node = mpp_trie_get_info_next(trie, node)));
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}
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mpp_log("dumping valid configure string done\n");
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mpp_log("dec cfg size %d count %d with trie node %d size %d\n",
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sizeof(MppDecCfgSet), mpp_trie_get_info_count(trie),
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mpp_trie_get_node_count(trie), mpp_trie_get_buf_size(trie));
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} |