mirror of
https://github.com/nyanmisaka/mpp.git
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7e060500df
Support Codec list: - [x] H.264 - [x] H.265 - [x] m2vd - [x] m4vd - [x] H.263 - [x] AV1 - [x] AVS - [x] AVS2 - [x] JPEG - [x] VP8 - [x] VP9 Signed-off-by: Rimon Xu <rimon.xu@rock-chips.com> Change-Id: Ieff2ef14482256031fcc699e6894a546c9b29502
198 lines
5.3 KiB
C
198 lines
5.3 KiB
C
/*
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* Copyright 2021 Rockchip Electronics Co. LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __AV1D_PARSER_H__
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#define __AV1D_PARSER_H__
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#include <stdlib.h>
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#include "mpp_mem.h"
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#include "mpp_bitread.h"
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#include "mpp_frame.h"
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#include "parser_api.h"
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#include "av1.h"
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#include "av1d_codec.h"
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#include "av1d_cbs.h"
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#include "av1d_syntax.h"
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#include "av1d_common.h"
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#include "av1_entropymode.h"
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extern RK_U32 av1d_debug;
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#define AV1D_DBG_FUNCTION (0x00000001)
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#define AV1D_DBG_HEADER (0x00000002)
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#define AV1D_DBG_REF (0x00000004)
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#define AV1D_DBG_STRMIN (0x00000008)
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#define AV1D_DBG_DUMP_RPU (0x10000000)
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#define av1d_dbg(flag, fmt, ...) _mpp_dbg_f(av1d_debug, flag, fmt, ##__VA_ARGS__)
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#define av1d_dbg_func(fmt, ...) av1d_dbg(AV1D_DBG_FUNCTION, fmt, ## __VA_ARGS__)
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typedef struct RefInfo {
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RK_S32 ref_count;
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RK_U32 invisible;
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RK_U32 is_output;
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RK_U32 lst_frame_offset;
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RK_U32 lst2_frame_offset;
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RK_U32 lst3_frame_offset;
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RK_U32 gld_frame_offset;
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RK_U32 bwd_frame_offset;
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RK_U32 alt2_frame_offset;
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RK_U32 alt_frame_offset;
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RK_U32 is_intra_frame;
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RK_U32 intra_only;
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} RefInfo;
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typedef struct GlobalMtionParams {
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RK_U32 wmtype;
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RK_S32 wmmat[6];
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RK_S32 wmmat_val[6];
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RK_S32 alpha, beta, gamma, delta;
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} GlobalMtionParams;
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typedef struct AV1Frame {
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MppFrame f;
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RK_S32 slot_index;
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AV1RawFrameHeader *raw_frame_header;
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RK_S32 temporal_id;
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RK_S32 spatial_id;
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RK_U8 order_hint;
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GlobalMtionParams gm_params[AV1_NUM_REF_FRAMES];
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RK_U8 skip_mode_frame_idx[2];
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AV1RawFilmGrainParams film_grain;
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RK_U8 coded_lossless;
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RefInfo *ref;
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} AV1Frame;
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typedef struct AV1Context_t {
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BitReadCtx_t gb;
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AV1RawSequenceHeader *sequence_header;
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AV1RawSequenceHeader *seq_ref;
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AV1RawFrameHeader *raw_frame_header;
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Av1UnitFragment current_obu;
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RK_S32 seen_frame_header;
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RK_U8 *frame_header;
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size_t frame_header_size;
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AV1Frame ref[AV1_NUM_REF_FRAMES];
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AV1Frame cur_frame;
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MppFrameMasteringDisplayMetadata mastering_display;
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MppFrameContentLightMetadata content_light;
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MppFrameHdrDynamicMeta *hdr_dynamic_meta;
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RK_U32 hdr_dynamic;
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RK_U32 is_hdr;
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RK_S32 temporal_id;
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RK_S32 spatial_id;
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RK_S32 operating_point_idc;
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RK_S32 bit_depth;
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RK_S32 order_hint;
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RK_S32 frame_width;
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RK_S32 frame_height;
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RK_S32 upscaled_width;
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RK_S32 render_width;
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RK_S32 render_height;
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RK_S32 num_planes;
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RK_S32 coded_lossless;
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RK_S32 all_lossless;
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RK_S32 tile_cols;
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RK_S32 tile_rows;
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RK_S32 tile_num;
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RK_S32 operating_point;
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RK_S32 extra_has_frame;
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RK_U32 frame_tag_size;
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RK_U32 fist_tile_group;
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RK_U32 tile_offset;
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AV1CDFs *cdfs;
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MvCDFs *cdfs_ndvc;
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AV1CDFs default_cdfs;
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MvCDFs default_cdfs_ndvc;
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AV1CDFs cdfs_last[NUM_REF_FRAMES];
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MvCDFs cdfs_last_ndvc[NUM_REF_FRAMES];
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RK_U8 disable_frame_end_update_cdf;
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RK_U8 frame_is_intra;
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RK_U8 refresh_frame_flags;
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const Av1UnitType *unit_types;
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RK_S32 nb_unit_types;
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RK_U32 tile_offset_start[AV1_MAX_TILES];
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RK_U32 tile_offset_end[AV1_MAX_TILES];
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AV1ReferenceFrameState ref_s[AV1_NUM_REF_FRAMES];
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MppBufSlots slots;
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MppBufSlots packet_slots;
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RK_U8 skip_ref0;
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RK_U8 skip_ref1;
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MppDecCfgSet *cfg;
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HalDecTask *task;
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RK_S32 eos; ///< current packet contains an EOS/EOB NAL
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RK_S64 pts;
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RK_S64 dts;
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const MppDecHwCap *hw_info;
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} AV1Context;
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#ifdef __cplusplus
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extern "C" {
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#endif
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MPP_RET av1d_parser_init(Av1CodecContext *ctx, ParserCfg *init);
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MPP_RET av1d_parser_deinit(Av1CodecContext *ctx);
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RK_S32 av1d_parser_frame(Av1CodecContext *ctx, HalDecTask *in_task);
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void av1d_parser_update(Av1CodecContext *ctx, void *info);
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MPP_RET av1d_paser_reset(Av1CodecContext *ctx);
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RK_S32 av1d_split_frame(Av1CodecContext *ctx,
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RK_U8 **out_data, RK_S32 *out_size,
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RK_U8 *data, RK_S32 size);
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MPP_RET av1d_get_frame_stream(Av1CodecContext *ctx, RK_U8 *buf, RK_S32 length);
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MPP_RET av1d_split_init(Av1CodecContext *ctx);
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RK_S32 av1d_parser2_syntax(Av1CodecContext *ctx);
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RK_S32 mpp_av1_split_fragment(AV1Context *ctx, Av1UnitFragment *frag, RK_S32 header_flag);
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RK_S32 mpp_av1_read_fragment_content(AV1Context *ctx, Av1UnitFragment *frag);
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RK_S32 mpp_av1_set_context_with_sequence(Av1CodecContext *ctx,
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const AV1RawSequenceHeader *seq);
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void mpp_av1_fragment_reset(Av1UnitFragment *frag);
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RK_S32 mpp_av1_assemble_fragment(AV1Context *ctx, Av1UnitFragment *frag);
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void mpp_av1_flush(AV1Context *ctx);
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void mpp_av1_close(AV1Context *ctx);
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void mpp_av1_free_metadata(void *unit, RK_U8 *content);
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void Av1GetCDFs(AV1Context *ctx, RK_U32 ref_idx);
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void Av1StoreCDFs(AV1Context *ctx, RK_U32 refresh_frame_flags);
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#ifdef __cplusplus
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}
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#endif
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#endif // __AV1D_PARSER_H__
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