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6a64cde817
1. Add vpu_api_mlvec module. 2. Attach vpu_api_mlvec module to vpu_api_legacy. 3. Add static and dynamic configure process. 4. At VpuApiLegacy::init if the extra_data is NULL do not get sps/pps. 5. Add VPU_API_GET_EXTRA_INFO (0x200) control to provide sps/pps. Change-Id: I4666148ba4c150eea81bfa8cd25b63264cd16a2b Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
93 lines
3 KiB
C
93 lines
3 KiB
C
/*
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* Copyright 2020 Rockchip Electronics Co. LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __VPU_API_MLVEC_H__
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#define __VPU_API_MLVEC_H__
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#include "rk_mpi.h"
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#define MLVEC_MAGIC 'M'
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#define MLVEC_VERSION '0'
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#define VPU_API_ENC_MAX_TID_UPDATED (0x00000001)
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#define VPU_API_ENC_MARK_LTR_UPDATED (0x00000002)
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#define VPU_API_ENC_USE_LTR_UPDATED (0x00000004)
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#define VPU_API_ENC_FRAME_QP_UPDATED (0x00000008)
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#define VPU_API_ENC_BASE_PID_UPDATED (0x00000010)
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typedef struct VpuApiMlvecStaticCfg_t {
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RK_S16 width;
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RK_S16 sar_width;
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RK_S16 height;
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RK_S16 sar_height;
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RK_S32 rc_mode; /* 0 - CQP mode; 1 - CBR mode; */
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RK_S32 bitRate; /* target bitrate */
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RK_S32 framerate;
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RK_S32 qp;
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RK_S32 enableCabac;
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RK_S32 cabacInitIdc;
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RK_S32 format;
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RK_S32 intraPicRate;
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RK_S32 framerateout;
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RK_S32 profileIdc;
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RK_S32 levelIdc;
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RK_S32 magic; /* MLVEC magic word */
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/* static configure */
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RK_S32 max_tid : 8; /* max temporal layer id */
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RK_S32 ltr_frames : 8; /* max long-term reference frame count */
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RK_S32 hdr_on_idr : 8; /* sps/pps header with IDR frame */
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RK_S32 add_prefix : 8; /* add prefix before each frame */
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RK_S32 slice_mbs : 16; /* macroblock row count for each slice */
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RK_S32 reserved : 16;
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} VpuApiMlvecStaticCfg;
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typedef struct VpuApiMlvecDynamicCfg_t {
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/* dynamic configure */
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RK_U32 updated;
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RK_S32 max_tid;
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RK_S32 mark_ltr;
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RK_S32 use_ltr;
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RK_S32 frame_qp;
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RK_S32 base_layer_pid;
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} VpuApiMlvecDynamicCfg;
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typedef void* VpuApiMlvec;
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#ifdef __cplusplus
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extern "C" {
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#endif
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MPP_RET vpu_api_mlvec_init(VpuApiMlvec *ctx);
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MPP_RET vpu_api_mlvec_deinit(VpuApiMlvec ctx);
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/* setup basic mpp info in vpu_api */
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MPP_RET vpu_api_mlvec_setup(VpuApiMlvec ctx, MppCtx mpp, MppApi *mpi, MppEncCfg enc_cfg);
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/* check the input encoder parameter is mlvec configure or not */
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MPP_RET vpu_api_mlvec_check_cfg(void *p);
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/* setup mlvec static configure */
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MPP_RET vpu_api_mlvec_set_st_cfg(VpuApiMlvec ctx, VpuApiMlvecStaticCfg *cfg);
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/* setup mlvec dynamic configure and setup MppMeta in MppFrame */
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MPP_RET vpu_api_mlvec_set_dy_cfg(VpuApiMlvec ctx, VpuApiMlvecDynamicCfg *cfg, MppMeta meta);
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/* setup mlvec max temporal layer count dynamic configure */
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MPP_RET vpu_api_mlvec_set_dy_max_tid(VpuApiMlvec ctx, RK_S32 max_tid);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __VPU_API_MLVEC_H__ */
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