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https://github.com/nyanmisaka/mpp.git
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c1f1c12dcf
1. Add rps_update_flag to indicate whether to update rps. 2. Fix global cfg data len for vdpu384a. Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com> Change-Id: I1c664c99f34f6dea940368496175273042b48b18
244 lines
9.4 KiB
C
244 lines
9.4 KiB
C
/*
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*
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* Copyright 2015 Rockchip Electronics Co. LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/*
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* @file h265d_syntax.h
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* @brief
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* @author csy(csy@rock-chips.com)
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* @version 1.0.0
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* @history
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* 2015.7.15 : Create
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*/
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#ifndef __H265D_SYNTAX__
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#define __H265D_SYNTAX__
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typedef unsigned long DWORD;
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typedef unsigned char BYTE;
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typedef unsigned short WORD;
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typedef unsigned long ULONG;
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typedef unsigned short USHORT;
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typedef unsigned char UCHAR;
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typedef unsigned int UINT;
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typedef unsigned int UINT32;
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typedef signed int BOOL;
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typedef signed int INT;
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typedef signed char CHAR;
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typedef signed short SHORT;
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typedef signed long LONG;
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typedef void *PVOID;
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/* HEVC Picture Entry structure */
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#define MAX_SLICES 600
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typedef struct _DXVA_PicEntry_HEVC {
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union {
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struct {
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UCHAR Index7Bits : 7;
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UCHAR AssociatedFlag : 1;
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};
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UCHAR bPicEntry;
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};
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} DXVA_PicEntry_HEVC, *LPDXVA_PicEntry_HEVC;
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typedef struct _Short_SPS_RPS_HEVC {
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UCHAR num_negative_pics;
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UCHAR num_positive_pics;
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SHORT delta_poc_s0[16];
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UCHAR s0_used_flag[16];
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SHORT delta_poc_s1[16];
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UCHAR s1_used_flag[16];
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} Short_SPS_RPS_HEVC;
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typedef struct _LT_SPS_RPS_HEVC {
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USHORT lt_ref_pic_poc_lsb;
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UCHAR used_by_curr_pic_lt_flag;
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} LT_SPS_RPS_HEVC;
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/* HEVC Picture Parameter structure */
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typedef struct _DXVA_PicParams_HEVC {
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USHORT PicWidthInMinCbsY;
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USHORT PicHeightInMinCbsY;
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union {
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struct {
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USHORT chroma_format_idc : 2;
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USHORT separate_colour_plane_flag : 1;
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USHORT bit_depth_luma_minus8 : 3;
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USHORT bit_depth_chroma_minus8 : 3;
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USHORT log2_max_pic_order_cnt_lsb_minus4 : 4;
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USHORT NoPicReorderingFlag : 1;
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USHORT NoBiPredFlag : 1;
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USHORT ReservedBits1 : 1;
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};
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USHORT wFormatAndSequenceInfoFlags;
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};
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DXVA_PicEntry_HEVC CurrPic;
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UCHAR sps_max_dec_pic_buffering_minus1;
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UCHAR log2_min_luma_coding_block_size_minus3;
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UCHAR log2_diff_max_min_luma_coding_block_size;
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UCHAR log2_min_transform_block_size_minus2;
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UCHAR log2_diff_max_min_transform_block_size;
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UCHAR max_transform_hierarchy_depth_inter;
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UCHAR max_transform_hierarchy_depth_intra;
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UCHAR num_short_term_ref_pic_sets;
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UCHAR num_long_term_ref_pics_sps;
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UCHAR num_ref_idx_l0_default_active_minus1;
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UCHAR num_ref_idx_l1_default_active_minus1;
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CHAR init_qp_minus26;
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UCHAR ucNumDeltaPocsOfRefRpsIdx;
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USHORT wNumBitsForShortTermRPSInSlice;
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USHORT ReservedBits2;
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union {
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struct {
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UINT32 scaling_list_enabled_flag : 1;
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UINT32 amp_enabled_flag : 1;
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UINT32 sample_adaptive_offset_enabled_flag : 1;
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UINT32 pcm_enabled_flag : 1;
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UINT32 pcm_sample_bit_depth_luma_minus1 : 4;
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UINT32 pcm_sample_bit_depth_chroma_minus1 : 4;
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UINT32 log2_min_pcm_luma_coding_block_size_minus3 : 2;
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UINT32 log2_diff_max_min_pcm_luma_coding_block_size : 2;
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UINT32 pcm_loop_filter_disabled_flag : 1;
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UINT32 long_term_ref_pics_present_flag : 1;
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UINT32 sps_temporal_mvp_enabled_flag : 1;
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UINT32 strong_intra_smoothing_enabled_flag : 1;
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UINT32 dependent_slice_segments_enabled_flag : 1;
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UINT32 output_flag_present_flag : 1;
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UINT32 num_extra_slice_header_bits : 3;
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UINT32 sign_data_hiding_enabled_flag : 1;
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UINT32 cabac_init_present_flag : 1;
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UINT32 ReservedBits3 : 5;
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};
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UINT32 dwCodingParamToolFlags;
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};
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union {
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struct {
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UINT32 constrained_intra_pred_flag : 1;
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UINT32 transform_skip_enabled_flag : 1;
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UINT32 cu_qp_delta_enabled_flag : 1;
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UINT32 pps_slice_chroma_qp_offsets_present_flag : 1;
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UINT32 weighted_pred_flag : 1;
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UINT32 weighted_bipred_flag : 1;
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UINT32 transquant_bypass_enabled_flag : 1;
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UINT32 tiles_enabled_flag : 1;
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UINT32 entropy_coding_sync_enabled_flag : 1;
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UINT32 uniform_spacing_flag : 1;
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UINT32 loop_filter_across_tiles_enabled_flag : 1;
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UINT32 pps_loop_filter_across_slices_enabled_flag : 1;
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UINT32 deblocking_filter_override_enabled_flag : 1;
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UINT32 pps_deblocking_filter_disabled_flag : 1;
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UINT32 lists_modification_present_flag : 1;
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UINT32 slice_segment_header_extension_present_flag : 1;
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UINT32 IrapPicFlag : 1;
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UINT32 IdrPicFlag : 1;
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UINT32 IntraPicFlag : 1;
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// sps exension flags
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UINT32 sps_extension_flag : 1;
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UINT32 sps_range_extension_flag : 1;
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UINT32 transform_skip_rotation_enabled_flag : 1;
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UINT32 transform_skip_context_enabled_flag : 1;
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UINT32 implicit_rdpcm_enabled_flag : 1;
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UINT32 explicit_rdpcm_enabled_flag : 1;
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UINT32 extended_precision_processing_flag : 1;
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UINT32 intra_smoothing_disabled_flag : 1;
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UINT32 high_precision_offsets_enabled_flag : 1;
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UINT32 persistent_rice_adaptation_enabled_flag : 1;
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UINT32 cabac_bypass_alignment_enabled_flag : 1;
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// pps exension flags
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UINT32 cross_component_prediction_enabled_flag : 1;
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UINT32 chroma_qp_offset_list_enabled_flag : 1;
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};
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UINT32 dwCodingSettingPicturePropertyFlags;
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};
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CHAR pps_cb_qp_offset;
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CHAR pps_cr_qp_offset;
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UCHAR num_tile_columns_minus1;
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UCHAR num_tile_rows_minus1;
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USHORT column_width_minus1[19];
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USHORT row_height_minus1[21];
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UCHAR diff_cu_qp_delta_depth;
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CHAR pps_beta_offset_div2;
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CHAR pps_tc_offset_div2;
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UCHAR log2_parallel_merge_level_minus2;
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INT CurrPicOrderCntVal;
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DXVA_PicEntry_HEVC RefPicList[15];
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UCHAR ReservedBits5;
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INT PicOrderCntValList[15];
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UCHAR RefPicSetStCurrBefore[8];
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UCHAR RefPicSetStCurrAfter[8];
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UCHAR RefPicSetLtCurr[8];
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USHORT ReservedBits6;
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USHORT ReservedBits7;
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UINT StatusReportFeedbackNumber;
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UINT32 vps_id;
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UINT32 pps_id;
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UINT32 sps_id;
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INT current_poc;
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Short_SPS_RPS_HEVC cur_st_rps;
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Short_SPS_RPS_HEVC sps_st_rps[64];
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LT_SPS_RPS_HEVC sps_lt_rps[32];
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// PPS exentison
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UCHAR log2_max_transform_skip_block_size;
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UCHAR diff_cu_chroma_qp_offset_depth;
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CHAR cb_qp_offset_list[6];
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CHAR cr_qp_offset_list[6];
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UCHAR chroma_qp_offset_list_len_minus1;
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UCHAR scaling_list_data_present_flag;
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UCHAR ps_update_flag;
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UCHAR rps_update_flag;
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} DXVA_PicParams_HEVC, *LPDXVA_PicParams_HEVC;
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/* HEVC Quantizatiuon Matrix structure */
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typedef struct _DXVA_Qmatrix_HEVC {
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UCHAR ucScalingLists0[6][16];
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UCHAR ucScalingLists1[6][64];
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UCHAR ucScalingLists2[6][64];
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UCHAR ucScalingLists3[2][64];
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UCHAR ucScalingListDCCoefSizeID2[6];
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UCHAR ucScalingListDCCoefSizeID3[2];
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} DXVA_Qmatrix_HEVC, *LPDXVA_Qmatrix_HEVC;
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/* HEVC Slice Control Structure */
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typedef struct _DXVA_Slice_HEVC_Short {
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UINT BSNALunitDataLocation;
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UINT SliceBytesInBuffer;
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USHORT wBadSliceChopping;
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} DXVA_Slice_HEVC_Short, *LPDXVA_Slice_HEVC_Short;
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/* just use in the case of pps->slice_header_extension_present_flag is 1 */
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typedef struct _DXVA_Slice_HEVC_Cut_Param {
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UINT start_bit;
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UINT end_bit;
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USHORT is_enable;
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} DXVA_Slice_HEVC_Cut_Param, *LPDXVA_Slice_HEVC_Cut_Param;
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typedef struct h265d_dxva2_picture_context {
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DXVA_PicParams_HEVC pp;
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DXVA_Qmatrix_HEVC qm;
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UINT32 slice_count;
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DXVA_Slice_HEVC_Short *slice_short;
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const UCHAR *bitstream;
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UINT32 bitstream_size;
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DXVA_Slice_HEVC_Cut_Param *slice_cut_param;
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INT max_slice_num;
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} h265d_dxva2_picture_context_t;
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#endif /*__H265D_SYNTAX__*/
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