H.264: intra8x8 and inter8x8 for luma only
H.265: intra/inter 8x8/16x16 for luma and chroma,
intra/inter 32x32 for luma
Change-Id: I6ca3d5985af7d3d7e7c1bc99db820cd166be0624
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
1. Fix AQ setup error for smart H.264
2. Fix initial value error of qp_min
3. Adjust H.264 regs setup for CVR scene
Change-Id: I38b09edb95532a3c1e9a544584c6d258f05fc43b
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
1. Add AQ regs setup. There is no aq clip operation which is
different from vepu500.
2. Update anti-stripe regs setup. Option "-atl 1/0" to enable/disable.
3. Add anti-ringing regs setup
4. Add anti-flicker regs setup
Change-Id: Ia36073d26ab5587f3478f7f8b4cdfe8a1ffed8f4
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
1. Add cu_qp_delta_depth cfg
2. Configure AQ regs for H.265
3. Configure regs according to scene mode
4. Support fixed frame level QP
5. Add RDO lambda table index
6. Update stat info for HEVC
7. Add tuning code for H.264 encoder
Change-Id: Id7dae4ed55e1b94622aee72cfce8f24c833d00e1
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
pass1 frame will disable split mode, so split out need to be disable.
Change-Id: Id1d504f954848c6b4b270788ecf077897238f82f
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Some registers are deprecated, no need to assign.
Change-Id: Ia313a770579aa3539dc13661bacc01c27f003e59
Signed-off-by: Tingjin Huang <timkingh.huang@rock-chips.com>
Proofread and streamline the register header file for vepu510
Change-Id: I4acf200969de7c9cb7a3ad49b6d77fa4d6fc2609
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
Fix the issue of unstable QP values in H.264 encoding when using fixqp
mode with configured max/min QP
Change-Id: I979d3086baa4a68d919c772e7babea78e1a95e34
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
The dvbm_err_en must be cleared before hw start.
Change-Id: Ic3e51f01ba0722e0490dc7d819ca248516cd60b8
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
