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[vepu541]: Support fbc_hdr_stride from frame info

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Change-Id: Ibe7644dd7bb3ae334821af70fee5c006a6b46549
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
This commit is contained in:
sayon.chen 2022-06-21 17:33:32 +08:00 • committed by Herman Chen
parent 8fd9a478ba
commit eee9b87c30
2 changed files with 17 additions and 7 deletions
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15
mpp/hal/rkenc/h264e/hal_h264e_vepu541.c
View file

@ -425,7 +425,8 @@ static void setup_vepu541_normal(Vepu541H264eRegSet *regs, RK_U32 is_vepu540)
hal_h264e_dbg_func("leave\n");
}
static MPP_RET setup_vepu541_prep(Vepu541H264eRegSet *regs, MppEncPrepCfg *prep)
static MPP_RET setup_vepu541_prep(Vepu541H264eRegSet *regs, MppEncPrepCfg *prep,
HalEncTask *task)
{
VepuFmtCfg cfg;
MppFrameFormat fmt = prep->format;
@ -456,8 +457,14 @@ static MPP_RET setup_vepu541_prep(Vepu541H264eRegSet *regs, MppEncPrepCfg *prep)
regs->reg017.src_range = cfg.src_range;
regs->reg017.out_fmt_cfg = 0;
y_stride = (MPP_FRAME_FMT_IS_FBC(fmt)) ? (MPP_ALIGN(prep->width, 16)) :
(prep->hor_stride) ? (prep->hor_stride) : (prep->width);
if (MPP_FRAME_FMT_IS_FBC(fmt)) {
y_stride = mpp_frame_get_fbc_hdr_stride(task->frame);
if (!y_stride)
y_stride = MPP_ALIGN(prep->hor_stride, 16);
} else
y_stride = (prep->hor_stride) ? (prep->hor_stride) : (prep->width);
c_stride = (hw_fmt == VEPU541_FMT_YUV422SP || hw_fmt == VEPU541_FMT_YUV420SP) ?
y_stride : y_stride / 2;
@ -1441,7 +1448,7 @@ static MPP_RET hal_h264e_vepu541_gen_regs(void *hal, HalEncTask *task)
memset(regs, 0, sizeof(*regs));
setup_vepu541_normal(regs, ctx->is_vepu540);
ret = setup_vepu541_prep(regs, &ctx->cfg->prep);
ret = setup_vepu541_prep(regs, &ctx->cfg->prep, task);
if (ret)
return ret;

9
mpp/hal/rkenc/h265e/hal_h265e_vepu541.c
View file

@ -994,7 +994,8 @@ static MPP_RET vepu541_h265_set_rc_regs(H265eV541HalContext *ctx, H265eV541RegSe
return MPP_OK;
}
static MPP_RET vepu541_h265_set_pp_regs(H265eV541RegSet *regs, VepuFmtCfg *fmt, MppEncPrepCfg *prep_cfg)
static MPP_RET vepu541_h265_set_pp_regs(H265eV541RegSet *regs, VepuFmtCfg *fmt,
MppEncPrepCfg *prep_cfg, HalEncTask *task)
{
RK_S32 stridey = 0;
RK_S32 stridec = 0;
@ -1006,7 +1007,9 @@ static MPP_RET vepu541_h265_set_pp_regs(H265eV541RegSet *regs, VepuFmtCfg *fmt,
regs->src_fmt.src_range = fmt->src_range;
regs->src_proc.src_rot = prep_cfg->rotation;
if (MPP_FRAME_FMT_IS_FBC(prep_cfg->format)) {
stridey = MPP_ALIGN(prep_cfg->width, 16);
stridey = mpp_frame_get_fbc_hdr_stride(task->frame);
if (!stridey)
stridey = MPP_ALIGN(prep_cfg->hor_stride, 16);
} else if (prep_cfg->hor_stride) {
stridey = prep_cfg->hor_stride;
} else {
@ -1513,7 +1516,7 @@ MPP_RET hal_h265e_v541_gen_regs(void *hal, HalEncTask *task)
regs->synt_nal.nal_unit_type = i_nal_type;
}
vepu54x_h265_set_hw_address(ctx, regs, task);
vepu541_h265_set_pp_regs(regs, fmt, &ctx->cfg->prep);
vepu541_h265_set_pp_regs(regs, fmt, &ctx->cfg->prep, task);
vepu541_h265_set_rc_regs(ctx, regs, task);