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[mpp_device]: Move mpp_device to osal

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Change-Id: Ia196f01945d47c24e821da8935f3694834afa839
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
This commit is contained in:
Herman Chen 2020-11-05 16:52:24 +08:00
parent 3f8e880a39
commit af6938b235
37 changed files with 48 additions and 838 deletions
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7
mpp/hal/CMakeLists.txt
View file

@ -22,12 +22,6 @@ add_library(mpp_hal STATIC
set_target_properties(mpp_hal PROPERTIES FOLDER "mpp/hal")
# ----------------------------------------------------------------------------
# add hardware worker implement
# ----------------------------------------------------------------------------
add_subdirectory(worker/mpp_device)
add_subdirectory(worker/libv4l2)
target_link_libraries(mpp_hal
${HAL_AVSD}
${HAL_H263D}
@ -43,5 +37,4 @@ target_link_libraries(mpp_hal
${HAL_H265E}
${HAL_VP8E}
hal_dummy
mpp_device
)

2
mpp/hal/rkdec/avsd/hal_avsd_reg.h
View file

@ -17,7 +17,7 @@
#ifndef __HAL_AVSD_REG_H__
#define __HAL_AVSD_REG_H__
#include "mpp_device_api.h"
#include "mpp_device.h"
#include "parser_api.h"
#include "hal_avsd_api.h"

2
mpp/hal/rkdec/h264d/hal_h264d_global.h
View file

@ -21,7 +21,7 @@
#include "mpp_hal.h"
#include "mpp_log.h"
#include "mpp_device_api.h"
#include "mpp_device.h"
#include "dxva_syntax.h"
#include "h264d_syntax.h"

10
mpp/hal/rkdec/h265d/hal_h265d_reg.c
View file

@ -36,7 +36,7 @@
#include "mpp_bitread.h"
#include "mpp_bitput.h"
#include "mpp_device_api.h"
#include "mpp_device.h"
#include "cabac.h"
#include "hal_h265d_reg.h"
#include "hal_h265d_api.h"
@ -266,18 +266,10 @@ static RK_U32 hevc_ver_align(RK_U32 val)
return MPP_ALIGN(val, 8);
}
#ifdef SOFIA_3GR_LINUX
static RK_U32 hevc_hor_align(RK_U32 val)
{
return MPP_ALIGN(val, 64);
}
#else
static RK_U32 hevc_hor_align(RK_U32 val)
{
return MPP_ALIGN(val, 256) | 256;
}
#endif
static MPP_RET hal_h265d_alloc_res(void *hal)
{

2
mpp/hal/rkdec/vp9d/hal_vp9d_api.c
View file

@ -28,7 +28,7 @@
#include "mpp_common.h"
#include "mpp_bitput.h"
#include "mpp_device_api.h"
#include "mpp_device.h"
#include "hal_vp9d_api.h"
#include "hal_vp9d_reg.h"
#include "vp9d_syntax.h"

2
mpp/hal/rkenc/common/vepu541_common.h
View file

@ -17,7 +17,7 @@
#define __VEPU541_COMMON_H__
#include "rk_venc_cmd.h"
#include "mpp_device_api.h"
#include "mpp_device.h"
#define VEPU541_REG_BASE_HW_STATUS 0x0000001C
#define VEPU541_REG_BASE_STATISTICS 0x00000210

2
mpp/hal/rkenc/h264e/hal_h264e_vepu541.c
View file

@ -22,7 +22,7 @@
#include "mpp_mem.h"
#include "mpp_frame.h"
#include "mpp_common.h"
#include "mpp_device_api.h"
#include "mpp_device.h"
#include "mpp_frame_impl.h"
#include "mpp_rc.h"

2
mpp/hal/rkenc/h265e/hal_h265e_vepu541.c
View file

@ -23,7 +23,7 @@
#include "mpp_env.h"
#include "mpp_mem.h"
#include "mpp_common.h"
#include "mpp_device_api.h"
#include "mpp_device.h"
#include "mpp_frame_impl.h"
#include "h265e_syntax_new.h"

2
mpp/hal/vpu/h263d/hal_h263d_base.h
View file

@ -17,7 +17,7 @@
#ifndef __HAL_H263D_BASE_H__
#define __HAL_H263D_BASE_H__
#include "mpp_device_api.h"
#include "mpp_device.h"
typedef struct h263d_reg_context {
MppHalApi hal_api;

2
mpp/hal/vpu/h264e/hal_h264e_vepu1_v2.c
View file

@ -22,7 +22,7 @@
#include "mpp_mem.h"
#include "mpp_frame.h"
#include "mpp_common.h"
#include "mpp_device_api.h"
#include "mpp_device.h"
#include "mpp_rc.h"
#include "mpp_enc_hal.h"

2
mpp/hal/vpu/h264e/hal_h264e_vepu2_v2.c
View file

@ -22,7 +22,7 @@
#include "mpp_mem.h"
#include "mpp_frame.h"
#include "mpp_common.h"
#include "mpp_device_api.h"
#include "mpp_device.h"
#include "mpp_rc.h"
#include "mpp_enc_hal.h"

2
mpp/hal/vpu/h265e/hal_h265e_base.h
View file

@ -20,7 +20,7 @@
#include "mpp_env.h"
#include "mpp_log.h"
#include "mpp_common.h"
#include "mpp_device_api.h"
#include "mpp_device.h"
#include "mpp_hal.h"
#include "rga_api.h"

2
mpp/hal/vpu/jpegd/hal_jpegd_base.h
View file

@ -20,7 +20,7 @@
#include <stdio.h>
#include "mpp_hal.h"
#include "mpp_device_api.h"
#include "mpp_device.h"
typedef struct PPInfo_t {
/* PP parameters */

2
mpp/hal/vpu/jpegd/hal_jpegd_vdpu1.c
View file

@ -940,7 +940,7 @@ MPP_RET hal_jpegd_vdpu1_start(void *hal, HalTaskInfo *task)
MppDevRegRdCfg rd_cfg;
RK_U32 reg_size = mpp_get_ioctl_version() ?
sizeof(((JpegdIocRegInfo *)0)->regs) :
sizeof(JpegdIocRegInfo) - sizeof(RegExtraInfo);
sizeof(JpegdIocRegInfo) - EXTRA_INFO_SIZE;
wr_cfg.reg = regs;
wr_cfg.size = reg_size;

4
mpp/hal/vpu/jpegd/hal_jpegd_vdpu1_reg.h
View file

@ -16,7 +16,7 @@
#ifndef __HAL_JPEGD_VDPU1_REG_TABLE_H__
#define __HAL_JPEGD_VDPU1_REG_TABLE_H__
#include "mpp_device_patch.h"
#include "vcodec_service.h"
#define JPEGD_REG_NUM (101)
@ -608,7 +608,7 @@ typedef struct JpegdIocRegInfo_t {
/* vepu_reg_num - vdpu_reg_num */
RK_U32 regs_diff[164 - JPEGD_REG_NUM];
RegExtraInfo extra_info;
RK_U8 extra_info[EXTRA_INFO_SIZE];
} JpegdIocRegInfo;
#endif

2
mpp/hal/vpu/jpegd/hal_jpegd_vdpu2.c
View file

@ -924,7 +924,7 @@ MPP_RET hal_jpegd_vdpu2_start(void *hal, HalTaskInfo *task)
MppDevRegRdCfg rd_cfg;
RK_U32 reg_size = mpp_get_ioctl_version() ?
sizeof(((JpegdIocRegInfo *)0)->regs) :
sizeof(JpegdIocRegInfo) - sizeof(RegExtraInfo);
sizeof(JpegdIocRegInfo) - EXTRA_INFO_SIZE;
wr_cfg.reg = regs;
wr_cfg.size = reg_size;

4
mpp/hal/vpu/jpegd/hal_jpegd_vdpu2_reg.h
View file

@ -17,7 +17,7 @@
#ifndef __HAL_JPEGD_VDPU2_REG_H__
#define __HAL_JPEGD_VDPU2_REG_H__
#include "mpp_device_patch.h"
#include "vcodec_service.h"
#define JPEGD_REG_NUM (159)
@ -671,7 +671,7 @@ typedef struct JpegdIocRegInfo_t {
/* vepu_reg_num - vdpu_reg_num */
RK_U32 regs_diff[184 - JPEGD_REG_NUM];
RegExtraInfo extra_info;
RK_U8 extra_info[EXTRA_INFO_SIZE];
} JpegdIocRegInfo;
#endif /* __HAL_JPEGD_VDPU2_REG_H__ */

2
mpp/hal/vpu/jpege/hal_jpege_base.h
View file

@ -17,7 +17,7 @@
#ifndef __HAL_JPEGE_BASE_H__
#define __HAL_JPEGE_BASE_H__
#include "mpp_device_api.h"
#include "mpp_device.h"
#include "mpp_hal.h"
#include "jpege_syntax.h"

4
mpp/hal/vpu/jpege/hal_jpege_vepu1_v2.c
View file

@ -23,9 +23,9 @@
#include "mpp_common.h"
#include "mpp_mem.h"
#include "mpp_platform.h"
#include "mpp_device_patch.h"
#include "mpp_enc_hal.h"
#include "vcodec_service.h"
#include "vepu_common.h"
@ -66,7 +66,7 @@ static MPP_RET hal_jpege_vepu1_init_v2(void *hal, MppEncHalCfg *cfg)
ctx->cfg = cfg->cfg;
ctx->reg_size = sizeof(RK_U32) * VEPU_JPEGE_VEPU1_NUM_REGS;
ctx->regs = mpp_calloc_size(void, ctx->reg_size + sizeof(RegExtraInfo));
ctx->regs = mpp_calloc_size(void, ctx->reg_size + EXTRA_INFO_SIZE);
if (NULL == ctx->regs) {
mpp_err_f("failed to malloc vepu1 regs\n");
return MPP_NOK;

4
mpp/hal/vpu/jpege/hal_jpege_vepu2_v2.c
View file

@ -23,9 +23,9 @@
#include "mpp_common.h"
#include "mpp_mem.h"
#include "mpp_platform.h"
#include "mpp_device_patch.h"
#include "mpp_enc_hal.h"
#include "vcodec_service.h"
#include "vepu_common.h"
@ -67,7 +67,7 @@ MPP_RET hal_jpege_vepu2_init_v2(void *hal, MppEncHalCfg *cfg)
memset(&ctx->hal_rc, 0, sizeof(ctx->hal_rc));
ctx->cfg = cfg->cfg;
ctx->reg_size = sizeof(RK_U32) * VEPU_JPEGE_VEPU2_NUM_REGS;
ctx->regs = mpp_calloc_size(void, ctx->reg_size + sizeof(RegExtraInfo));
ctx->regs = mpp_calloc_size(void, ctx->reg_size + EXTRA_INFO_SIZE);
if (NULL == ctx->regs) {
mpp_err_f("failed to malloc vepu2 regs\n");
return MPP_NOK;

2
mpp/hal/vpu/m2vd/hal_m2vd_base.h
View file

@ -20,7 +20,7 @@
#include <stdio.h>
#include "mpp_hal.h"
#include "mpp_buf_slot.h"
#include "mpp_device_api.h"
#include "mpp_device.h"
#include "mpp_mem.h"
#include "m2vd_syntax.h"

2
mpp/hal/vpu/mpg4d/hal_m4vd_com.h
View file

@ -18,7 +18,7 @@
#define __HAL_M4VD_COM_H__
#include "mpp_hal.h"
#include "mpp_device_api.h"
#include "mpp_device.h"
#include "mpg4d_syntax.h"

2
mpp/hal/vpu/vp8d/hal_vp8d_base.h
View file

@ -21,7 +21,7 @@
#include "mpp_hal.h"
#include "mpp_buf_slot.h"
#include "mpp_device_api.h"
#include "mpp_device.h"
#include "hal_task.h"

2
mpp/hal/vpu/vp8e/hal_vp8e_base.h
View file

@ -20,7 +20,7 @@
#include "mpp_mem.h"
#include "mpp_hal.h"
#include "mpp_device_api.h"
#include "mpp_device.h"
#include "vp8e_syntax.h"

66
mpp/hal/worker/inc/mpp_device.h
View file

@ -1,66 +0,0 @@
/*
* Copyright 2015 Rockchip Electronics Co. LTD
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __MPP_DEVICE_H__
#define __MPP_DEVICE_H__
#include "mpp_device_patch.h"
#include "mpp_service.h"
typedef struct MppDevCfg_t {
// input
MppCtxType type;
MppCodingType coding;
RK_U32 platform;
RK_U32 pp_enable;
RK_U32 hw_id;
} MppDevCfg;
typedef void* MppDevCtx;
#ifdef __cplusplus
extern "C"
{
#endif
/*
* hardware device open function
* coding and type for device name detection
*/
MPP_RET mpp_device_init(MppDevCtx *ctx, MppDevCfg *cfg);
MPP_RET mpp_device_deinit(MppDevCtx ctx);
/*
* control function for set or get device property
*/
RK_S32 mpp_device_control(MppDevCtx ctx, MppDevCmd cmd, void *param);
/*
* register access interface
*/
MPP_RET mpp_device_send_extra_info(MppDevCtx ctx, RegExtraInfo *info);
MPP_RET mpp_device_send_reg(MppDevCtx ctx, RK_U32 *regs, RK_U32 nregs);
MPP_RET mpp_device_wait_reg(MppDevCtx ctx, RK_U32 *regs, RK_U32 nregs);
MPP_RET mpp_device_send_reg_with_id(MppDevCtx ctx, RK_S32 id, void *param, RK_S32 size);
MPP_RET mpp_device_add_request(MppDevCtx ctx, MppReqV1 *req);
MPP_RET mpp_device_send_request(MppDevCtx ctx);
#ifdef __cplusplus
}
#endif
#endif /* __MPP_DEVICE_H__ */

60
mpp/hal/worker/inc/mpp_device_patch.h
View file

@ -1,60 +0,0 @@
/*
* Copyright 2015 Rockchip Electronics Co. LTD
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0 *
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __MPP_DEVICE_PATCH_H__
#define __MPP_DEVICE_PATCH_H__
#include "rk_type.h"
#include "mpp_err.h"
#define MPX_PATCH_NUM 16
typedef struct RegPatchSlotInfo_t {
RK_U32 reg_idx;
RK_U32 offset;
} RegPatchInfo;
typedef struct RegExtraInfo_t {
RK_U32 magic; // Fix magic value 0x4C4A46
RK_U32 count; // valid patch info count
RegPatchInfo patchs[MPX_PATCH_NUM];
} RegExtraInfo;
#ifdef __cplusplus
extern "C"
{
#endif
/* Reset RegExtraInfo structure magic and reset count to zero */
void mpp_device_patch_init(RegExtraInfo *extra);
/*
* Register file has hardware address register which value is composed by:
* bit 0 - 9 - ion/drm buffer fd
* bit 10 - 31 - offset from the buffer start address
* When the offset is larger then 4M (22 bit) the 32-bit register can not
* save all the bits use a extra info structure right behind register file array
* Then the extra info structure is RegExtraInfo.
*/
void mpp_device_patch_add(RK_U32 *reg, RegExtraInfo *extra, RK_U32 reg_idx,
RK_U32 offset);
RK_S32 mpp_device_patch_is_valid(RegExtraInfo *extra);
#ifdef __cplusplus
}
#endif
#endif /* __MPP_DEVICE_PATCH_H__ */

1
mpp/hal/worker/libv4l2/CMakeLists.txt
View file

@ -1 +0,0 @@
# vim: syntax=cmake

5
mpp/hal/worker/mpp_device/CMakeLists.txt
View file

@ -1,5 +0,0 @@
# vim: syntax=cmake
# ----------------------------------------------------------------------------
# add mpp_device implement for hardware register transaction
# ----------------------------------------------------------------------------
add_library(mpp_device STATIC mpp_device.c)

643
mpp/hal/worker/mpp_device/mpp_device.c
View file

@ -1,643 +0,0 @@
/*
* Copyright 2015 Rockchip Electronics Co. LTD
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#define MODULE_TAG "mpp_device"
#include <sys/ioctl.h>
#include <fcntl.h>
#include <errno.h>
#include <string.h>
#include <unistd.h>
#include "mpp_env.h"
#include "mpp_log.h"
#include "mpp_mem.h"
#include "mpp_time.h"
#include "mpp_common.h"
#include "mpp_device.h"
#include "mpp_platform.h"
#include "vpu.h"
#include "mpp_service.h"
#include "vcodec_service.h"
#define MAX_TIME_RECORD 4
typedef struct MppDevCtxImpl_t {
MppCtxType type;
MppCodingType coding;
RK_S32 client_type;
RK_U32 platform; // platfrom for vcodec to init
RK_U32 mmu_status; // 0 disable, 1 enable
RK_U32 pp_enable; // postprocess, 0 disable, 1 enable
RK_S32 vpu_fd;
RK_S64 time_start[MAX_TIME_RECORD];
RK_S64 time_end[MAX_TIME_RECORD];
RK_S32 idx_send;
RK_S32 idx_wait;
RK_S32 idx_total;
/*
* 0 - vcodec_service SEG_REG / GET_REG ioctl set
* 1 - mpp_service MPP_IOC_CFG_V1 ioctl set
*/
RK_S32 ioctl_version;
RK_S32 req_cnt;
MppReqV1 reqs[MAX_REQ_NUM];
/* support max cmd buttom */
const MppServiceCmdCap *cap;
} MppDevCtxImpl;
#define MPP_DEVICE_DBG_FUNC (0x00000001)
#define MPP_DEVICE_DBG_DETAIL (0x00000002)
#define MPP_DEVICE_DBG_HW_SUPPORT (0x00000008)
#define MPP_DEVICE_DBG_REG (0x00000010)
#define MPP_DEVICE_DBG_TIME (0x00000020)
#define mpp_dev_dbg(flag, fmt, ...) _mpp_dbg(mpp_device_debug, flag, fmt, ## __VA_ARGS__)
#define mpp_dev_dbg_f(flag, fmt, ...) _mpp_dbg_f(mpp_device_debug, flag, fmt, ## __VA_ARGS__)
#define mpp_dev_dbg_func(fmt, ...) mpp_dev_dbg_f(MPP_DEVICE_DBG_FUNC, fmt, ## __VA_ARGS__)
#define mpp_dev_dbg_detail(fmt, ...) mpp_dev_dbg_f(MPP_DEVICE_DBG_DETAIL, fmt, ## __VA_ARGS__)
#define mpp_dev_dbg_hw_cap(fmt, ...) mpp_dev_dbg(MPP_DEVICE_DBG_HW_SUPPORT, fmt, ## __VA_ARGS__)
#define mpp_dev_dbg_reg(fmt, ...) mpp_dev_dbg(MPP_DEVICE_DBG_REG, fmt, ## __VA_ARGS__)
#define mpp_dev_dbg_time(fmt, ...) mpp_dev_dbg(MPP_DEVICE_DBG_TIME, fmt, ## __VA_ARGS__)
static RK_U32 mpp_device_debug = 0;
static MPP_RET mpp_check_cmd_valid(RK_U32 cmd, MppDevCtxImpl *p)
{
const MppServiceCmdCap *cap = p->cap;
MPP_RET ret = MPP_OK;
if (cap->support_cmd > 0) {
RK_U32 found = 0;
found = (cmd < cap->query_cmd) ? 1 : 0;
found = (cmd >= MPP_CMD_INIT_BASE && cmd < cap->init_cmd) ? 1 : found;
found = (cmd >= MPP_CMD_SEND_BASE && cmd < cap->send_cmd) ? 1 : found;
found = (cmd >= MPP_CMD_POLL_BASE && cmd < cap->poll_cmd) ? 1 : found;
found = (cmd >= MPP_CMD_CONTROL_BASE && cmd < cap->ctrl_cmd) ? 1 : found;
ret = found ? MPP_OK : MPP_NOK;
}
return ret;
}
static RK_S32 mpp_device_set_client_type(MppDevCtx ctx, int dev, RK_S32 client_type)
{
RK_S32 ret;
static RK_S32 mpp_device_ioctl_version = -1;
MppDevCtxImpl *p = (MppDevCtxImpl *)ctx;
if (p->ioctl_version > 0) {
MppReqV1 mpp_req;
RK_U32 client_data = client_type;
mpp_req.cmd = MPP_CMD_INIT_CLIENT_TYPE;
mpp_req.flag = 0;
mpp_req.size = sizeof(client_data);
mpp_req.offset = 0;
mpp_req.data_ptr = REQ_DATA_PTR(&client_data);
ret = (RK_S32)ioctl(dev, MPP_IOC_CFG_V1, &mpp_req);
} else {
if (mpp_device_ioctl_version < 0) {
ret = ioctl(dev, VPU_IOC_SET_CLIENT_TYPE, (unsigned long)client_type);
if (!ret) {
mpp_device_ioctl_version = 0;
} else {
ret = ioctl(dev, VPU_IOC_SET_CLIENT_TYPE_U32, (RK_U32)client_type);
if (!ret)
mpp_device_ioctl_version = 1;
}
mpp_assert(ret == 0);
} else {
RK_U32 cmd = (mpp_device_ioctl_version == 0) ?
(VPU_IOC_SET_CLIENT_TYPE) :
(VPU_IOC_SET_CLIENT_TYPE_U32);
ret = ioctl(dev, cmd, client_type);
}
}
if (ret)
mpp_err_f("set client type failed ret %d errno %d\n", ret, errno);
return ret;
}
static RK_S32 mpp_device_get_client_type(MppDevCtx ctx, MppCtxType type, MppCodingType coding)
{
RK_S32 client_type = -1;
MppDevCtxImpl *p;
if (NULL == ctx || type >= MPP_CTX_BUTT ||
(coding >= MPP_VIDEO_CodingMax || coding <= MPP_VIDEO_CodingUnused)) {
mpp_err_f("found NULL input ctx %p coding %d type %d\n", ctx, coding, type);
return MPP_ERR_NULL_PTR;
}
p = (MppDevCtxImpl *)ctx;
if (p->ioctl_version > 0) {
if (p->pp_enable)
client_type = (p->platform & HAVE_VDPU1) ?
VPU_CLIENT_VDPU1_PP : VPU_CLIENT_VDPU2_PP;
else {
RK_U32 i = 0;
while (i < 32 && !((p->platform >> i) & 0x1)) i++;
client_type = i;
}
} else { /* ioctl mode is original */
if (type == MPP_CTX_ENC)
client_type = VPU_ENC;
else /* MPP_CTX_DEC */
client_type = p->pp_enable ? VPU_DEC_PP : VPU_DEC;
}
return client_type;
}
MPP_RET mpp_device_init(MppDevCtx *ctx, MppDevCfg *cfg)
{
RK_S32 dev = -1;
const char *name = NULL;
MppDevCtxImpl *p;
if (NULL == ctx || NULL == cfg) {
mpp_err_f("found NULL input ctx %p cfg %p\n", ctx, cfg);
return MPP_ERR_NULL_PTR;
}
mpp_dev_dbg_func("enter %p coding %d type %d platform %x\n",
ctx, cfg->coding, cfg->type, cfg->platform);
*ctx = NULL;
mpp_env_get_u32("mpp_device_debug", &mpp_device_debug, 0);
p = mpp_calloc(MppDevCtxImpl, 1);
if (NULL == p) {
mpp_err_f("malloc failed\n");
return MPP_ERR_MALLOC;
}
p->coding = cfg->coding;
p->type = cfg->type;
p->platform = cfg->platform;
p->pp_enable = cfg->pp_enable;
p->ioctl_version = mpp_get_ioctl_version();
if (p->platform)
name = mpp_get_platform_dev_name(p->type, p->coding, p->platform);
else
name = mpp_get_vcodec_dev_name(p->type, p->coding);
if (name) {
dev = open(name, O_RDWR);
if (dev > 0) {
RK_S32 client_type;
RK_S32 ret;
/* if ioctl_version is 1, query hw supprot*/
if (p->ioctl_version > 0)
p->cap = mpp_get_mpp_service_cmd_cap();
client_type = mpp_device_get_client_type(p, p->type, p->coding);
ret = mpp_device_set_client_type(p, dev, client_type);
if (ret) {
close(dev);
dev = -2;
}
p->client_type = client_type;
} else
mpp_err_f("failed to open device %s, errno %d, error msg: %s\n",
name, errno, strerror(errno));
} else
mpp_err_f("failed to find device for coding %d type %d\n", p->coding, p->type);
*ctx = p;
p->vpu_fd = dev;
if (p->ioctl_version > 0)
cfg->hw_id = mpp_get_client_hw_id(p->client_type);
else
cfg->hw_id = 0;
mpp_dev_dbg_func("leave %p\n", dev);
return MPP_OK;
}
MPP_RET mpp_device_deinit(MppDevCtx ctx)
{
MppDevCtxImpl *p;
if (NULL == ctx) {
mpp_err_f("found NULL input ctx %p\n", ctx);
return MPP_ERR_NULL_PTR;
}
mpp_dev_dbg_func("enter %p\n", ctx);
p = (MppDevCtxImpl *)ctx;
if (p->vpu_fd > 0) {
close(p->vpu_fd);
} else {
mpp_err_f("invalid negtive file handle,\n");
}
mpp_free(p);
mpp_dev_dbg_func("leave %p\n", ctx);
return MPP_OK;
}
MPP_RET mpp_device_add_request(MppDevCtx ctx, MppReqV1 *req)
{
MppDevCtxImpl *p = (MppDevCtxImpl *)ctx;
mpp_dev_dbg_func("enter %p req %p\n", ctx, req);
if (NULL == p) {
mpp_err_f("found NULL input ctx %p\n", ctx);
return MPP_ERR_NULL_PTR;
}
if (p->ioctl_version <= 0) {
mpp_err_f("ctx %p can't add request without /dev/mpp_service\n", ctx);
return MPP_ERR_PERM;
}
if (p->req_cnt >= MAX_REQ_NUM) {
mpp_err_f("ctx %p request count %d overfow\n", ctx, p->req_cnt);
return MPP_ERR_VALUE;
}
if (mpp_check_cmd_valid(req->cmd, p)) {
mpp_err_f("ctx %p cmd 0x%08x not support\n", ctx, req->cmd);
return MPP_ERR_VALUE;
}
if (!p->req_cnt)
memset(p->reqs, 0, sizeof(p->reqs));
MppReqV1 *mpp_req = &p->reqs[p->req_cnt];
mpp_req->cmd = req->cmd;
mpp_req->flag = req->flag;
mpp_req->size = req->size;
mpp_req->offset = req->offset;
mpp_req->data_ptr = REQ_DATA_PTR(req->data_ptr);
p->req_cnt++;
mpp_dev_dbg_detail("enter %p cnt %d cmd %08x flag %x size %3x offset %08x data %p\n",
ctx, p->req_cnt, req->cmd, req->flag,
req->size, req->offset, req->data_ptr);
mpp_dev_dbg_func("leave %p req %p\n", ctx, req);
return MPP_OK;
}
MPP_RET mpp_device_send_request(MppDevCtx ctx)
{
MppDevCtxImpl *p = (MppDevCtxImpl *)ctx;;
mpp_dev_dbg_func("enter %p\n", ctx);
if (NULL == p) {
mpp_err_f("found NULL input ctx %p\n", ctx);
return MPP_ERR_NULL_PTR;
}
if (p->ioctl_version <= 0) {
mpp_err_f("ctx %p can't add request without /dev/mpp_service\n", ctx);
return MPP_ERR_PERM;
}
if (p->req_cnt <= 0 || p->req_cnt > MAX_REQ_NUM) {
mpp_err_f("ctx %p invalid request count %d\n", ctx, p->req_cnt);
return MPP_ERR_VALUE;
}
/* setup flag for multi message request */
if (p->req_cnt > 1) {
RK_S32 i;
for (i = 0; i < p->req_cnt; i++)
p->reqs[i].flag |= MPP_FLAGS_MULTI_MSG;
}
p->reqs[p->req_cnt - 1].flag |= MPP_FLAGS_LAST_MSG;
mpp_dev_dbg_detail("enter %p cnt %d\n", ctx, p->req_cnt);
MPP_RET ret = (RK_S32)ioctl(p->vpu_fd, MPP_IOC_CFG_V1, &p->reqs[0]);
if (ret) {
mpp_err_f("ioctl MPP_IOC_CFG_V1 failed ret %d errno %d %s\n",
ret, errno, strerror(errno));
ret = errno;
}
p->req_cnt = 0;
mpp_dev_dbg_func("leave %p\n", ctx);
return ret;
}
MPP_RET mpp_device_send_single_request(MppDevCtx ctx, MppReqV1 *req)
{
MPP_RET ret = MPP_OK;
MppDevCtxImpl *p = (MppDevCtxImpl *)ctx;
mpp_dev_dbg_func("enter %p req %p\n", ctx, req);
if (NULL == p) {
mpp_err_f("found NULL input ctx %p\n", ctx);
return MPP_ERR_NULL_PTR;
}
if (p->ioctl_version <= 0) {
mpp_err_f("ctx %p can't add request without /dev/mpp_service\n", ctx);
return MPP_ERR_PERM;
}
ret = (RK_S32)ioctl(p->vpu_fd, MPP_IOC_CFG_V1, req);
if (ret) {
mpp_err_f("ioctl MPP_IOC_CFG_V1 failed ret %d errno %d %s\n",
ret, errno, strerror(errno));
ret = errno;
}
mpp_dev_dbg_func("leave %p\n", ctx);
return ret;
}
MPP_RET mpp_device_send_extra_info(MppDevCtx ctx, RegExtraInfo *info)
{
MPP_RET ret = MPP_OK;
if (NULL == ctx || NULL == info) {
mpp_err_f("found NULL input ctx %p size %d\n", ctx, info);
return MPP_ERR_NULL_PTR;
}
mpp_dev_dbg_func("enter %p info %p\n", ctx, info);
/* 1. When extra info is invalid do NOT send */
if (info->magic != EXTRA_INFO_MAGIC || !info->count)
return ret;
MppDevCtxImpl *p = (MppDevCtxImpl *)ctx;
/* 2. When on old kernel do NOT send */
if (p->ioctl_version == IOCTL_VCODEC_SERVICE)
return ret;
if (p->ioctl_version == IOCTL_MPP_SERVICE_V1) {
MppReqV1 dev_req;
memset(&dev_req, 0, sizeof(dev_req));
dev_req.cmd = MPP_CMD_SET_REG_ADDR_OFFSET;
dev_req.flag = 0;
dev_req.offset = 0;
dev_req.size = info->count * sizeof(info->patchs[0]);
dev_req.data_ptr = REQ_DATA_PTR(&info->patchs[0]);
ret = mpp_device_add_request(ctx, &dev_req);
if (ret)
mpp_err_f("mpp_device_send_extra_info failed ret %d\n", ret);
}
mpp_dev_dbg_func("leave %p ret %d\n", ctx, ret);
return ret;
}
MPP_RET mpp_device_send_reg(MppDevCtx ctx, RK_U32 *regs, RK_U32 nregs)
{
int ret = 0;
MppDevCtxImpl *p;
mpp_dev_dbg_func("enter %p reg %p nregs %d\n", ctx, regs, nregs);
if (NULL == ctx || NULL == regs) {
mpp_err_f("found NULL input ctx %p regs %p\n", ctx, regs);
return MPP_ERR_NULL_PTR;
}
p = (MppDevCtxImpl *)ctx;
if (mpp_device_debug & MPP_DEVICE_DBG_REG) {
RK_U32 i;
for (i = 0; i < nregs; i++) {
mpp_log("set reg[%03d]: %08x\n", i, regs[i]);
}
}
if (mpp_device_debug & MPP_DEVICE_DBG_TIME) {
p->time_start[p->idx_send++] = mpp_time();
if (p->idx_send >= MAX_TIME_RECORD)
p->idx_send = 0;
}
if (p->ioctl_version > 0) {
MppReqV1 dev_req;
memset(&dev_req, 0, sizeof(dev_req));
dev_req.cmd = MPP_CMD_SET_REG_WRITE;
dev_req.flag = 0;
dev_req.offset = 0;
dev_req.size = nregs * sizeof(RK_U32);
dev_req.data_ptr = REQ_DATA_PTR(regs);
mpp_device_add_request(ctx, &dev_req);
memset(&dev_req, 0, sizeof(dev_req));
dev_req.cmd = MPP_CMD_SET_REG_READ;
dev_req.flag = 0;
dev_req.offset = 0;
dev_req.size = nregs * sizeof(RK_U32);
dev_req.data_ptr = REQ_DATA_PTR(regs);
mpp_device_add_request(ctx, &dev_req);
ret = mpp_device_send_request(ctx);
} else {
MppReq req;
req.req = regs;
req.size = nregs * sizeof(RK_U32);
ret = (RK_S32)ioctl(p->vpu_fd, VPU_IOC_SET_REG, &req);
}
if (ret) {
mpp_err_f("ioctl VPU_IOC_SET_REG failed ret %d errno %d %s\n",
ret, errno, strerror(errno));
ret = errno;
}
mpp_dev_dbg_func("leave %p ret %d\n", ctx, ret);
return (ret ? MPP_NOK : MPP_OK);
}
MPP_RET mpp_device_wait_reg(MppDevCtx ctx, RK_U32 *regs, RK_U32 nregs)
{
int ret = 0;
MppReq req;
MppDevCtxImpl *p;
mpp_dev_dbg_func("enter %p regs %p nregs %d\n", ctx, regs, nregs);
if (NULL == ctx || NULL == regs) {
mpp_err_f("found NULL input ctx %p regs %p\n", ctx, regs);
return MPP_ERR_NULL_PTR;
}
p = (MppDevCtxImpl *)ctx;
if (p->ioctl_version > 0) {
MppReqV1 dev_req;
memset(&dev_req, 0, sizeof(dev_req));
dev_req.cmd = MPP_CMD_POLL_HW_FINISH;
dev_req.flag |= MPP_FLAGS_LAST_MSG;
ret = mpp_device_send_single_request(ctx, &dev_req);
} else {
memset(&req, 0, sizeof(req));
req.req = regs;
req.size = nregs * sizeof(RK_U32);
ret = (RK_S32)ioctl(p->vpu_fd, VPU_IOC_GET_REG, &req);
}
if (mpp_device_debug & MPP_DEVICE_DBG_TIME) {
RK_S32 idx = p->idx_wait;
p->time_end[idx] = mpp_time();
mpp_log("task %d time %.2f ms\n", p->idx_total,
(p->time_end[idx] - p->time_start[idx]) / 1000.0);
p->idx_total++;
if (++p->idx_wait >= MAX_TIME_RECORD)
p->idx_wait = 0;
}
if (mpp_device_debug & MPP_DEVICE_DBG_REG) {
RK_U32 i;
for (i = 0; i < nregs; i++) {
mpp_log("get reg[%03d]: %08x\n", i, regs[i]);
}
}
mpp_dev_dbg_func("leave %p ret %d\n", ctx, ret);
return (ret ? MPP_NOK : MPP_OK);
}
MPP_RET mpp_device_send_reg_with_id(MppDevCtx ctx, RK_S32 id, void *param,
RK_S32 size)
{
MPP_RET ret = MPP_NOK;
MppDevCtxImpl *p;
mpp_dev_dbg_func("enter %p id %d param %p size %d\n", ctx, id, param, size);
if (NULL == ctx || NULL == param) {
mpp_err_f("found NULL input ctx %p param %p\n", ctx, param);
return MPP_ERR_NULL_PTR;
}
p = (MppDevCtxImpl *)ctx;
if (p->ioctl_version > 0) {
mpp_err("not support now\n");
return MPP_ERR_UNKNOW;
} else {
ret = (RK_S32)ioctl(p->vpu_fd, VPU_IOC_WRITE(id, size), param);
}
if (ret) {
mpp_err_f("ioctl failed ret %d errno %d %s\n",
ret, errno, strerror(errno));
ret = errno;
}
mpp_dev_dbg_func("leave %p ret %d\n", ctx, ret);
return ret;
}
RK_S32 mpp_device_control(MppDevCtx ctx, MppDevCmd cmd, void* param)
{
MppDevCtxImpl *p;
if (NULL == ctx || NULL == param) {
mpp_err_f("found NULL input ctx %p param %p\n", ctx, param);
return MPP_ERR_NULL_PTR;
}
p = (MppDevCtxImpl *)ctx;
switch (cmd) {
case MPP_DEV_GET_MMU_STATUS : {
p->mmu_status = 1;
*((RK_U32 *)param) = p->mmu_status;
} break;
case MPP_DEV_ENABLE_POSTPROCCESS : {
p->pp_enable = 1;
} break;
case MPP_DEV_SET_HARD_PLATFORM : {
p->platform = *((RK_U32 *)param);
} break;
default : {
} break;
}
return 0;
}
void mpp_device_patch_init(RegExtraInfo *extra)
{
extra->magic = EXTRA_INFO_MAGIC;
extra->count = 0;
}
void mpp_device_patch_add(RK_U32 *reg, RegExtraInfo *extra, RK_U32 reg_idx, RK_U32 offset)
{
if (offset < SZ_4M) {
reg[reg_idx] += (offset << 10);
return ;
}
if (extra->count >= MPX_PATCH_NUM) {
mpp_err_f("too much %d patch count larger than %d\n",
extra->count, MPX_PATCH_NUM);
return ;
}
RegPatchInfo *info = &extra->patchs[extra->count++];
info->reg_idx = reg_idx;
info->offset = offset;
}
RK_S32 mpp_device_patch_is_valid(RegExtraInfo *extra)
{
return extra->magic == EXTRA_INFO_MAGIC && extra->count;
}

22
mpp/legacy/vpu.c
View file

@ -39,16 +39,21 @@
#define MPX_PATCH_NUM 16
typedef struct RegPatchSlotInfo_t {
typedef struct VpuPatchInfo_t {
RK_U32 reg_idx;
RK_U32 offset;
} RegPatchInfo;
} VpuPatchInfo;
typedef struct RegExtraInfo_t {
typedef struct VpuExtraInfo_t {
RK_U32 magic; // Fix magic value 0x4C4A46
RK_U32 count; // valid patch info count
RegPatchInfo patchs[MPX_PATCH_NUM];
} RegExtraInfo;
VpuPatchInfo patchs[MPX_PATCH_NUM];
} VpuExtraInfo;
typedef struct VPUReq {
RK_U32 *req;
RK_U32 size;
} VPUReq_t;
static RK_U32 vpu_debug = 0;
@ -191,16 +196,15 @@ RK_S32 VPUClientSendReg(int socket, RK_U32 *regs, RK_U32 nregs)
if (vpu_debug) {
RK_U32 i;
for (i = 0; i < nregs; i++) {
for (i = 0; i < nregs; i++)
mpp_log("set reg[%03d]: %08x\n", i, regs[i]);
}
}
if (ioctl_version > 0) {
MppReqV1 reqs[3];
RK_U32 reg_size = nregs;
RegExtraInfo *extra_info = (RegExtraInfo*)(regs + (nregs - 12));
VpuExtraInfo *extra_info = (VpuExtraInfo*)(regs + (nregs - VPU_EXTRA_INFO_SIZE));
reqs[0].cmd = MPP_DEV_CMD_SET_REG_WRITE;
reqs[0].flag = 0;
@ -274,7 +278,7 @@ RK_S32 VPUClientWaitResult(int socket, RK_U32 *regs, RK_U32 nregs, VPU_CMD_TYPE
if (ioctl_version > 0) {
MppReqV1 mpp_req;
RK_U32 reg_size = nregs;
RegExtraInfo *extra_info = (RegExtraInfo*)(regs + (nregs - 12));
VpuExtraInfo *extra_info = (VpuExtraInfo*)(regs + (nregs - VPU_EXTRA_INFO_SIZE));
if (extra_info && extra_info->magic == VPU_EXTRA_INFO_MAGIC) {
reg_size -= 2;

2
osal/CMakeLists.txt
View file

@ -26,7 +26,7 @@ set(MPP_ALLOCATOR
)
set(MPP_DRIVER
driver/mpp_device_v2.c
driver/mpp_device.c
driver/mpp_service.c
driver/vcodec_service.c
)

2
osal/driver/mpp_device_v2.c → osal/driver/mpp_device.c
View file

@ -22,7 +22,7 @@
#include "mpp_mem.h"
#include "mpp_platform.h"
#include "mpp_device_api.h"
#include "mpp_device.h"
#include "mpp_service_api.h"
#include "vcodec_service_api.h"

1
osal/driver/vcodec_service.c
View file

@ -241,7 +241,6 @@ MPP_RET vcodec_service_init(void *ctx, MppClientType type)
}
}
return ret;
}

6
osal/inc/mpp_device_api.h → osal/inc/mpp_device.h
View file

@ -14,8 +14,8 @@
* limitations under the License.
*/
#ifndef __MPP_DEVICE_API_H__
#define __MPP_DEVICE_API_H__
#ifndef __MPP_DEVICE_H__
#define __MPP_DEVICE_H__
#include "rk_type.h"
#include "mpp_err.h"
@ -95,4 +95,4 @@ MPP_RET mpp_dev_ioctl(MppDev ctx, RK_S32 cmd, void *param);
}
#endif
#endif /* __MPP_DEVICE_API_H__ */
#endif /* __MPP_DEVICE_H__ */

2
osal/inc/mpp_service_api.h
View file

@ -17,7 +17,7 @@
#ifndef __MPP_SERVICE_API_H__
#define __MPP_SERVICE_API_H__
#include "mpp_device_api.h"
#include "mpp_device.h"
#ifdef __cplusplus
extern "C" {

5
osal/inc/vcodec_service.h
View file

@ -44,9 +44,6 @@
#define VEPU2_REGISTERS (184)
#define RKVENC_REGISTERS (140)
typedef struct VPUReq {
RK_U32 *req;
RK_U32 size;
} VPUReq_t;
#define EXTRA_INFO_SIZE (sizeof(RK_U32) * 34)
#endif /* __VCODEC_SERVICE_H__ */

2
osal/inc/vcodec_service_api.h
View file

@ -17,7 +17,7 @@
#ifndef __VCODEC_SERVICE_API_H__
#define __VCODEC_SERVICE_API_H__
#include "mpp_device_api.h"
#include "mpp_device.h"
#ifdef __cplusplus
extern "C" {