arch: arm: dts: add Luckfox Pico Mini (RV1103)
This commit is contained in:
Austin Lane
Igor
parent
77650eb366
commit
6d149b13bb
4 changed files with 510 additions and 0 deletions
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@ -1130,6 +1130,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rv1103g-evb-v11.dtb \
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rv1103g-evb-v11-sii902x-bt6562hdmi.dtb \
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rv1103g-evb2-v10.dtb \
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rv1103g-luckfox-pico-mini.dtb \
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rv1103g-rmsl311-dloc-sl-v10.dtb \
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rv1103g-scaner-v10.dtb \
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rv1106g-38x38-ipc-v10.dtb \
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406
arch/arm/boot/dts/rv1103-luckfox-pico-ipc.dtsi
Executable file
406
arch/arm/boot/dts/rv1103-luckfox-pico-ipc.dtsi
Executable file
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@ -0,0 +1,406 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*/
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#include "rv1106-amp.dtsi"
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/ {
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acodec_sound: acodec-sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "rv-acodec";
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simple-audio-card,format = "i2s";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,cpu {
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sound-dai = <&i2s0_8ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&acodec>;
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};
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};
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vcc_1v8: vcc-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vcc_3v3: vcc-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vdd_arm: vdd-arm {
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compatible = "regulator-fixed";
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regulator-name = "vdd_arm";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-always-on;
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regulator-boot-on;
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};
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leds: leds {
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compatible = "gpio-leds";
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work_led: work{
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gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "activity";
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default-state = "on";
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};
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};
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// DHT11
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dht11_sensor {
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compatible = "dht11";
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pinctrl-names = "default";
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pinctrl-0 = <&gpio1_pc7>;
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dht11@1 {
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gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>;
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label = "dht11";
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linux,default-trigger = "humidity";
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};
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};
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};
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/***************************** AUDIO ********************************/
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&i2s0_8ch {
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#sound-dai-cells = <0>;
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status = "okay";
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};
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&acodec {
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#sound-dai-cells = <0>;
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pa-ctl-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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/***************************** CPU ********************************/
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&cpu0 {
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cpu-supply = <&vdd_arm>;
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};
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/***************************** ADC ********************************/
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&saradc {
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status = "okay";
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vref-supply = <&vcc_1v8>;
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};
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&tsadc {
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status = "okay";
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};
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/***************************** USB *********************************/
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&u2phy {
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status = "okay";
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};
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&u2phy_otg {
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status = "okay";
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};
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&usbdrd {
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status = "okay";
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};
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&usbdrd_dwc3 {
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extcon = <&u2phy>;
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status = "okay";
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};
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/*****************************CSI ********************************/
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&csi2_dphy_hw {
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status = "okay";
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};
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&csi2_dphy0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy_input0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&sc3336_out>;
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data-lanes = <1 2>;
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};
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csi_dphy_input1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&sc4336_out>;
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data-lanes = <1 2>;
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};
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csi_dphy_input2: endpoint@2 {
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reg = <2>;
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remote-endpoint = <&sc530ai_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi_csi2_input>;
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};
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};
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};
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};
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&i2c4 {
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status = "okay";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4m2_xfer>;
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sc3336: sc3336@30 {
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compatible = "smartsens,sc3336";
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status = "okay";
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reg = <0x30>;
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clocks = <&cru MCLK_REF_MIPI0>;
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clock-names = "xvclk";
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pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_refclk_out0>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CMK-OT2119-PC1";
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rockchip,camera-module-lens-name = "30IRC-F16";
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port {
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sc3336_out: endpoint {
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remote-endpoint = <&csi_dphy_input0>;
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data-lanes = <1 2>;
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};
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};
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};
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sc4336: sc4336@30 {
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compatible = "smartsens,sc4336";
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status = "okay";
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reg = <0x30>;
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clocks = <&cru MCLK_REF_MIPI0>;
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clock-names = "xvclk";
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pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_refclk_out0>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "OT01";
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rockchip,camera-module-lens-name = "40IRC_F16";
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port {
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sc4336_out: endpoint {
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remote-endpoint = <&csi_dphy_input1>;
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data-lanes = <1 2>;
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};
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};
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};
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sc530ai: sc530ai@30 {
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compatible = "smartsens,sc530ai";
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status = "okay";
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reg = <0x30>;
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clocks = <&cru MCLK_REF_MIPI0>;
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clock-names = "xvclk";
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pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_refclk_out0>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CMK-OT2115-PC1";
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rockchip,camera-module-lens-name = "30IRC-F16";
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port {
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sc530ai_out: endpoint {
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remote-endpoint = <&csi_dphy_input2>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&mipi0_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csi_dphy_output>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in>;
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};
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};
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};
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};
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&rkcif {
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status = "okay";
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};
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&rkcif_mipi_lvds {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_pins>;
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port {
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/* MIPI CSI-2 endpoint */
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cif_mipi_in: endpoint {
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remote-endpoint = <&mipi_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds_sditf {
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status = "okay";
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port {
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/* MIPI CSI-2 endpoint */
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mipi_lvds_sditf: endpoint {
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remote-endpoint = <&isp_in>;
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};
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};
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};
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&rkisp {
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status = "okay";
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};
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&rkisp_vir0 {
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status = "okay";
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port@0 {
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isp_in: endpoint {
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remote-endpoint = <&mipi_lvds_sditf>;
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};
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};
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};
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/***************************** PINCTRL ********************************/
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// SPI
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&spi0 {
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pinctrl-0 = <&spi0m0_clk &spi0m0_miso &spi0m0_mosi &spi0m0_cs0>;
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#address-cells = <1>;
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#size-cells = <0>;
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spidev@0 {
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compatible = "rockchip,spidev";
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spi-max-frequency = <50000000>;
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reg = <0>;
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};
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fbtft@0 {
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compatible = "sitronix,st7789v";
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reg = <0>;
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spi-max-frequency = <20000000>;
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fps = <30>;
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buswidth = <8>;
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debug = <0x7>;
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led-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;//BL
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dc-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;//DC
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reset-gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>;//RES
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};
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};
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// I2C
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&i2c3 {
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pinctrl-0 = <&i2c3m1_xfer>;
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};
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&i2c0 {
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pinctrl-0 = <&i2c0m2_xfer>;
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};
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// UART
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&uart3 {
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pinctrl-0 = <&uart3m1_xfer>;
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};
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&uart4 {
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pinctrl-0 = <&uart4m1_xfer>;
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};
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&uart5 {
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pinctrl-0 = <&uart5m0_xfer>;
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};
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// PWM
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&pwm0 {
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pinctrl-0 = <&pwm0m0_pins &pwm0m1_pins>;
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};
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&pwm1 {
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pinctrl-0 = <&pwm1m0_pins>;
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};
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&pwm2 {
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pinctrl-0 = <&pwm2m2_pins>;
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};
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&pwm3 {
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pinctrl-0 = <&pwm3m2_pins>;
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};
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&pwm4 {
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pinctrl-0 = <&pwm4m2_pins>;
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};
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&pwm5 {
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pinctrl-0 = <&pwm5m2_pins>;
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};
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&pwm6 {
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pinctrl-0 = <&pwm6m2_pins>;
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};
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&pwm8 {
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pinctrl-0 = <&pwm8m0_pins &pwm8m1_pins>;
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};
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&pwm9 {
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pinctrl-0 = <&pwm9m0_pins &pwm9m1_pins>;
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};
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&pwm10 {
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pinctrl-0 = <&pwm10m0_pins &pwm10m1_pins>;
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};
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&pwm11 {
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pinctrl-0 = <&pwm11m0_pins &pwm11m1_pins>;
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};
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&pinctrl {
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spi0 {
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spi0m0_clk: spi0m0-clk {
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rockchip,pins = <1 RK_PC1 4 &pcfg_pull_none>;
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};
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spi0m0_mosi: spi0m0-mosi {
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rockchip,pins = <1 RK_PC2 6 &pcfg_pull_none>;
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};
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spi0m0_miso: spi0m0-miso {
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rockchip,pins = <1 RK_PC3 6 &pcfg_pull_none>;
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};
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spi0m0_cs0: spi0m0-cs0 {
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rockchip,pins = <1 RK_PC0 4 &pcfg_pull_none>;
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};
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};
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gpio1-pc7 {
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gpio1_pc7: gpio1-pc7 {
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rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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91
arch/arm/boot/dts/rv1103g-luckfox-pico-mini.dts
Executable file
91
arch/arm/boot/dts/rv1103g-luckfox-pico-mini.dts
Executable file
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@ -0,0 +1,91 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Luckfox Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include "rv1103.dtsi"
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#include "rv1106-evb.dtsi"
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#include "rv1103-luckfox-pico-ipc.dtsi"
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/ {
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model = "Luckfox Pico Mini";
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compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1103";
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};
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/**********SFC**********/
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&sfc {
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status = "okay";
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flash@0 {
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <75000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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};
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};
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/**********SDMMC**********/
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&sdmmc {
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max-frequency = <50000000>;
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no-mmc;
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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disable-wp;
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//sdio
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cap-sdio-irq;
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non-removable;
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no-1-8-v;
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supports-sdio;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
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status = "okay";
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};
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/**********ETH**********/
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&gmac {
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status = "okay";
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};
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/**********USB**********/
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&usbdrd_dwc3 {
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status = "okay";
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dr_mode = "host";
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};
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/**********SPI**********/
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/* SPI0_M0 */
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&spi0 {
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status = "okay";
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spidev@0 {
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spi-max-frequency = <2000000>;
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};
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};
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/**********I2C**********/
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/* I2C3_M1 */
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&i2c3 {
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status = "okay";
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clock-frequency = <100000>;
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};
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/**********UART**********/
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/* UART3_M1 */
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&uart3 {
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status = "okay";
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};
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/* UART4_M1 */
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&uart4 {
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status = "okay";
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};
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/**********PWM**********/
|
||||
/* PWM1_M0 */
|
||||
&pwm1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -20,6 +20,18 @@
|
|||
|
||||
interrupt-parent = <&gic>;
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
/* OP-TEE secure RAM */
|
||||
optee@3d00000 {
|
||||
reg = <0x03d00000 0x00300000>; /* 3 MiB: 0x03D00000..0x04000000 */
|
||||
no-map; /* prevent the kernel from using this memory region */
|
||||
};
|
||||
};
|
||||
|
||||
aliases {
|
||||
csi2dphy0 = &csi2_dphy0;
|
||||
csi2dphy1 = &csi2_dphy1;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue